5秒后页面跳转
CAT1163WI-30-GT3 PDF预览

CAT1163WI-30-GT3

更新时间: 2024-02-14 02:17:32
品牌 Logo 应用领域
安森美 - ONSEMI 微控制器和处理器外围集成电路uCs集成电路uPs集成电路光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 217K
描述
Supervisory Circuits with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer (16K)

CAT1163WI-30-GT3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantHTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:5
Is Samacsys:NJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.9 mm
湿度敏感等级:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压:6 V
最小供电电压:2.7 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

CAT1163WI-30-GT3 数据手册

 浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第7页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第8页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第9页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第11页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第12页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第13页 
CAT1163  
Selective/Random Read  
array can be read during one operation. If more than E  
(where E=2047 for the CAT1163) bytes are read out,  
the counter will ‘wrap around’ and continue to clock out  
data bytes.  
Selective/Random READ operations allow the  
Master device to select at random any memory  
location for a READ operation. The Master device  
first performs a ‘dummy’ write operation by sending  
the START condition, slave address and byte  
addresses of the location it wishes to read. After the  
CAT1163 acknowledges, the Master device sends  
the START condition and the slave address again,  
Manual Reset Operation  
¯¯¯¯¯¯  
The CAT116x RESET or RESET pin can also be used  
as a manual reset input.  
Only the “active” edge of the manual reset input is  
internally sensed. The positive edge is sensed if  
RESET is used as a manual reset input and the  
¯¯  
this time with the R/W bit set to one. The CAT1163  
then responds with its acknowledge and sends the  
8-bit byte requested. The master device does not  
send an acknowledge but will generate a STOP  
condition.  
¯¯¯¯¯¯  
negative edge is sensed if RESET is used as a manual  
reset input.  
An internal counter starts a 200ms count. During this  
time, the complementary reset output will be kept in the  
active state. If the manual reset input is forced active for  
more than 200ms, the complementary reset output will  
switch back to the non active state after the 200ms  
expired, regardless for how long the manual reset input  
is forced active.  
Sequential Read  
The Sequential READ operation can be initiated by  
either the Immediate Address READ or Selective  
READ operations. After the CAT1163 sends the  
inital 8-bit byte requested, the Master will responds  
with an acknowledge which tells the device it  
requires more data. The CAT1163 will continue to  
output an 8-bit byte for each acknowledge, thus  
sending the STOP condition.  
The embedded EEPROM is disabled as long as a reset  
condition is maintained on any RESET pin. If the  
¯¯¯¯¯¯  
external forced RESET/RESET is longer than internal  
The data being transmitted from the CAT1163 is  
outputted sequentially with data from address N  
followed by data from address N+1. The READ  
operation address counter increments all of the  
CAT1163 address bits so that the entire memory  
, the memory will not  
controlled time-out period, tPURST  
respond with an acknowledge for any access as long as  
the manual reset input is active.  
Figure 10. Selective Read Timing  
S
T
A
R
T
S
T
A
R
T
S
T
O
P
BUS ACTIVITY:  
MASTER  
SLAVE  
ADDRESS  
BYTE  
ADDRESS (n)  
SLAVE  
ADDRESS  
SDA LINE  
S
S
P
A
C
K
A
C
K
A
C
K
N
O
DATA n  
A
C
K
Figure 11. Sequential Read Timing  
S
T
O
P
BUS ACTIVITY:  
MASTER  
SLAVE  
ADDRESS  
DATA n  
DATA n+1  
DATA n+2  
DATA n+x  
SDA LINE  
P
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
Doc. No. MD-3003 Rev. I  
10  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  

CAT1163WI-30-GT3 替代型号

型号 品牌 替代类型 描述 数据表
CAT1163WI-25-GT3 ONSEMI

类似代替

Supervisory Circuits with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog

与CAT1163WI-30-GT3相关器件

型号 品牌 获取价格 描述 数据表
CAT1163WI-30T2 CATALYST

获取价格

Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa
CAT1163WI-30T3 CATALYST

获取价格

Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa
CAT1163WI-30T3 ONSEMI

获取价格

SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, 0.150 MM, ROHS COMPLIANT, MS-012, SOIC-8
CAT1163WI-30TE13 CATALYST

获取价格

Microprocessor Circuit, CMOS, PDSO8, SOIC-8
CAT1163WI-30TE13 ROCHESTER

获取价格

SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163WI-30TE13 ONSEMI

获取价格

SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163WI42 ONSEMI

获取价格

SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163WI-42 CATALYST

获取价格

Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa
CAT1163WI-42G CATALYST

获取价格

暂无描述
CAT1163WI-42-G ONSEMI

获取价格

IC IC,SERIAL EEPROM,2KX8,CMOS,SOP,8PIN,PLASTIC, Microprocessor IC:Other