Datasheet > CAT1163LI-25GT3

CAT1163LI-25GT3

更新时间： 2024-02-20 00:04:25

品牌	Logo	应用领域
CATALYST		可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数	文件大小	规格书
14页	175K
描述
EEPROM, 2KX8, Serial, CMOS, PDIP8

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技术参数
数据手册

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CAT1163LI-25GT3 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	DIP, DIP8,.3	Reach Compliance Code：	unknown
风险等级：	5.84	数据保留时间-最小值：	100
耐久性：	1000000 Write/Erase Cycles	I2C控制字节：	1010MMMR
JESD-30 代码：	R-PDIP-T8	内存密度：	16384 bit
内存集成电路类型：	EEPROM	内存宽度：	8
端子数量：	8	字数：	2048 words
字数代码：	2000	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	2KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP8,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	并行/串行：	SERIAL
电源：	3/5 V	认证状态：	Not Qualified
串行总线类型：	I2C	最大待机电流：	0.00004 A
子类别：	EEPROMs	最大压摆率：	0.003 mA
表面贴装：	NO	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
写保护：	HARDWARE	Base Number Matches：	1

CAT1163LI-25GT3 数据手册

CAT1163

Acknowledge Polling

READ OPERATIONS

Disabling of the inputs can be used to take

advantage of the typical write cycle time. Once the

stop condition is issued to indicate the end of the

host’s write opration, the CAT1163 initiates the

internal write cycle. ACK polling can be initiated

immediately. This involves issuing the start condition

followed by the slave address for a write operation. If

the CAT1163 is still busy with the write operation, no

ACK will be returned. If a write operation has

completed, an ACK will be returned and the host can

then proceed with the next read or write operation.

The READ operation for the CAT1163 is initiated in the

same manner as the write operation with one exception,

¯¯

that R/W bit is set to one. Three different READ ope–

rations are possible: Immediate/Current Address READ,

Selective/Random READ and Sequential READ.

Immediate/Current Address Read

The CAT1163’s address counter contains the address

of the last byte accessed, incremented by one. In other

words, if the last READ or WRITE access was to

address N, the READ immediately following would

access data from address N+1. For all devices,

N=E=2047. The counter will wrap around to Zero and

continue to clock out valid data for the 16K devices.

After the CAT1163 receives its slave address

WRITE PROTECTION

The Write Protection feature allows the user to

protect against inadvertent memory array program-

ming. If the WP pin is tied to V_CC, the entire memory

array is protected and becomes read only. The

CAT1163 will accept both slave and byte addresses,

but the memory location accessed is protected from

programming by the device’s failure to send an

acknowledge after the first byte of data is received.

¯¯

information (with the R/W bit set to one), it issues an

acknowledge, then transmits the 8-bit byte requested.

The master device does not send an acknowledge, but

will generate a STOP condition.

Figure 9. Immediate Address Read Timing

BUS ACTIVIT Y:

MASTER

SLAVE

ADDRESS

SDA LINE

DATA

SCL

SDA

8TH BIT

DATA OUT

NO ACK

STOP

Characteristics subject to change without notice

Doc. No. 3003 Rev. E

1...6 7 8910 11 12...14

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与CAT1163LI-25GT3相关器件

型号	品牌	描述	获取价格	数据表
CAT1163LI-25-GT3	CATALYST	Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa	获取价格
CAT1163LI-25T2	CATALYST	Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa	获取价格
CAT1163LI-25T3	CATALYST	Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa	获取价格
CAT1163LI28	ONSEMI	SPECIALTY MICROPROCESSOR CIRCUIT, PDIP8, 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-001, DIP-	获取价格
CAT1163LI-28	CATALYST	Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Wa	获取价格
CAT1163LI-28	ONSEMI	IC SPECIALTY MICROPROCESSOR CIRCUIT, PDIP8, 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-001, D	获取价格

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