Datasheet > C9817AYB

C9817AYB

更新时间： 2024-01-14 08:15:37

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		光电二极管外围集成电路
页数	文件大小	规格书
19页	207K
描述
Processor Specific Clock Generator, CMOS, PDSO56, SSOP-56

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C9817AYB 技术参数

生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	SSOP,	针数：	56
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.84
JESD-30 代码：	R-PDSO-G56	JESD-609代码：	e0
长度：	18.415 mm	端子数量：	56
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
认证状态：	Not Qualified	座面最大高度：	2.794 mm
表面贴装：	YES	技术：	CMOS
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	DUAL
宽度：	7.5 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：	1

+/+…when timing is critical

C9817

133 MHz I²C Clock Generator for mobile Pentium^®III / Rambus Systems

Preliminary

Serial Control Registers

NOTE: The Pin# column lists the affected pin number where applicable. The @Pup column gives the state at true

power up. Bytes are set to the values shown only on true power up, and not when the PWR_DWN# pin is activated.

Following the acknowledge of the Address Byte (D2), two additional bytes must be sent:

1) “Command Code “ byte, and

2) “Byte Count” byte.

Although the data (bits) in these two bytes are considered “don’t care”, they must be sent and will be acknowledged.

Byte 0: Function Select Register

Bit

@Pup

Pin#

Description

Reserved

SST2* (see table4a, p.8)

SST1* (see table4a, p.8)

SST0* (see table4a, p.8)

Reserved

Bit1 Bit0

Tri-State (all outputs)

Spread Spectrum enabled (see table 4b, page7)

Test Mode (see table 3)

NON spread spectrum operating mode

INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.

MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571

WWW.IMICORP.COM

Rev 1.0

11/1/1999

Page 7 of 19

1...4 5 678 9 10...19

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