C8051F303
25 MIPS, 8 kB Flash, 11-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
Comparator
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Pipelined Instruction architecture; executes 70% of instructions in 1 or 2
system clocks
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Programmable hysteresis and response time
Configurable to generate interrupts or reset
Low current (0.4 µA)
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Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
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POR/Brown-Out Detector
Memory
On-Chip Debug
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256 bytes data RAM
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On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
Provides breakpoints, single stepping, watchpoints
Digital Peripherals
Inspect/modify memory, registers, and stack
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8 port I/O; all are 5 V tolerant
Superior performance to emulation systems using ICE-chips, target
Enhanced Hardware SMBus™ (I2C™ compatible) and UART serial
pods, and sockets
ports
Supply Voltage: 2.7 to 3.6 V
Programmable 16-bit counter/timer array with three capture/compare
modules, WDT
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Typical operating current: 5.8 mA at 25 MHz
11 µA at 32 kHz
3 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Typical stop mode current: <0.1 µA
Real-time clock mode using PCA or timer and external clock source
Temperature Range: –40 to +85 °C
Clock Sources
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Internal oscillator: 20 MHz nominal
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
PaCcaknasgweitch between clock sources on-the-fly
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11-pin MLP (Standard Lead and Lead-free packages)
Ordering Part Numbers
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Lead-free package: C8051F303-GM
Standard package: C8051F303
Analog/Digital
VDD
Power
GND
8
0
5
1
Port 0
Latch
C2D
P0.0
P0.1
Debug HW
8 kB
UART
Reset
FLASH
P
0
RST/C2CK
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVST
P0.7/C2D
Timer
X
0, 1, 2 /
256 Byte
SRAM
B
Brown-
POR
RTC
A
D
r
v
Out
R
PCA/
WDT
C
o
r
External
SMBus
SFR Bus
XTAL1
XTAL2
Oscillator
Circuit
System Clock
e
C2D
Internal
Oscillator
CP0
+
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Small Form Factor
Copyright © 2005 by Silicon Laboratories
4.8.2005