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C8051F317 PDF预览

C8051F317

更新时间： 2024-10-02 05:08:23
品牌 Logo 应用领域
芯科 - SILICON 闪存
页数 文件大小 规格书
2页 401K
描述
25 MIPS, 16 kB Flash, 24-Pin Mixed-Signal MCU

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C8051F317 数据手册

 浏览型号C8051F317的Datasheet PDF文件第2页 
C8051F317  
25 MIPS, 16 kB Flash, 24-Pin Mixed-Signal MCU  
Analog Peripherals  
High-Speed 8051 µC Core  
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2  
system clocks  
Up to 25 MIPS throughput with 25 MHz system clock  
Two Comparators  
-
-
-
Programmable hysteresis and response time  
Configurable to generate interrupts or reset  
Low current (<0.5 µA)  
-
-
Expanded interrupt handler  
POR/Brown-Out Detector  
Memory  
-
-
1280 bytes data RAM (1024 + 256)  
On-Chip Debug  
16 kB Flash; in-system programmable in 512-byte sectors (512 bytes  
are reserved)  
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system  
debug (no emulator required)  
-
-
Provides breakpoints, single stepping, watchpoints  
Digital Peripherals  
Inspect/modify memory, registers, and stack  
-
-
21 port I/O; all are 5 V tolerant  
Superior performance to emulation systems using ICE-chips, target pods,  
1 Enhanced Hardware SMBus™ (I2C™ compatible) and UART serial  
and sockets  
port  
-
Programmable 16-bit counter/timer array with three capture/compare  
modules, WDT  
Supply Voltage: 2.7 to 3.6 V  
-
-
-
Typical operating current: 5 mA at 25 MHz  
-
-
-
5 general-purpose 16-bit counter/timers  
Typical: 11 µA at 32 kHz  
Dedicated watchdog timer; bidirectional reset  
Real-time clock mode for maximum power saving  
Target stop mode current: <0.1 µA  
Clock Sources  
Temperature Range: –40 to +85 °C  
-
-
-
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation  
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)  
Can switch between clock sources on-the-fly  
Package  
-
24-pin QFN (lead-free package)  
P0.0/VREF  
P0.1  
P0.2/XTAL1  
P0.3/XTAL2  
P0.4/TX  
P0.5/RX  
P0.6/CNVST  
P0.7  
Analog/Digital  
Power  
VDD  
P
0
Port 0  
Latch  
Port 1  
Latch  
D
r
v
GND  
UART  
C
R
O
S
S
B
A
R
C2D  
16 kB  
FLASH  
8
0
5
1
P
1
Timer  
0,1,2,3 /  
RTC  
P1.0  
P1.1  
P1.2  
P1.3  
P1.4  
P1.5  
Debug HW  
Reset  
256 byte  
SRAM  
D
r
v
/RST/C2CK  
PCA/  
WDT  
Brown-  
POR  
1 kB  
SRAM  
Out  
SMBus  
SPI  
P
2
P2.0  
P2.1  
P2.2  
P2.3  
P2.4  
P2.5  
C
o
r
XTAL1  
XTAL2  
External  
Oscillator  
Circuit  
System Clock  
D
r
v
SFR Bus  
Port 2  
Latch  
2%  
e
Internal  
Oscillator  
P3.0/C2D  
P
3
Port 3  
Latch  
D
r
v
CP0  
CP1  
+
-
+
-
Small Form Factor  
Copyright © 2005 by Silicon Laboratories  
9.14.2005  
12

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