SPOC - BTS5572E
Serial Peripheral Interface (SPI)
Unless otherwise specified: VBB = 9 V to 16 V, Tj = -40 °C to +150 °C, VDD = 3.8 V to 5.5 V
typical values: VBB = 13.5 V, Tj = 25 °C, VDD = 4.3 V
Pos. Parameter
Symbol
Limit Values
Unit Test Conditions
min. typ. max.
9.4.8 H level output voltage
VSO(H)
VDD
0.5 V
ISO(OFF) -10
-
–
VDD
V
ISO = 0.5 mA
DD = 4.3 V
VCS =VDD
V
9.4.9 Output tristate leakage current
Timings
–
10
µA
9.4.10 Serial clock frequency
9.4.11 Serial clock period
9.4.12 Serial clock high time
9.4.13 Serial clock low time
fSCLK
0
–
–
–
–
–
2
–
–
–
–
MHz
ns
ns
ns
µs
–
–
–
–
–
tSCLK(P) 500
tSCLK(H) 250
tSCLK(L) 250
9.4.14 Enable lead time (falling CS to rising tCS(lead)
1
SCLK)
9.4.15 Enable lag time (falling SCLK to rising tCS(lag)
1
–
–
–
–
–
–
µs
µs
ns
–
–
–
CS)
9.4.16 Transfer delay time (rising CS to
falling CS)
tCS(td)
1
9.4.17 Data setup time (required time SI to tSI(su)
100
falling SCLK)
9.4.18 Data hold time (falling SCLK to SI)
tSI(h)
100
–
–
–
–
1
ns
µs
–
9.4.19 Output enable time (falling CS to SO tSO(en)
CL = 20 pF 1)
valid)
9.4.20 Output disable time (rising CS to SO tSO(dis)
–
–
–
–
1
µs
CL = 20 pF 1)
CL = 20 pF 1)
tri-state)
9.4.21 Output data valid time with capacitive tSO(v)
250
ns
load
1) Not subject to production test, specified by design.
Data Sheet
40
Rev. 1.0, 2008-05-15