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BQ4024YMA-85 PDF预览

BQ4024YMA-85

更新时间: 2024-02-08 20:55:15
品牌 Logo 应用领域
其他 - ETC 静态存储器
页数 文件大小 规格书
12页 433K
描述
128Kx16 Nonvolatile SRAM

BQ4024YMA-85 数据手册

 浏览型号BQ4024YMA-85的Datasheet PDF文件第2页浏览型号BQ4024YMA-85的Datasheet PDF文件第3页浏览型号BQ4024YMA-85的Datasheet PDF文件第4页浏览型号BQ4024YMA-85的Datasheet PDF文件第5页浏览型号BQ4024YMA-85的Datasheet PDF文件第6页浏览型号BQ4024YMA-85的Datasheet PDF文件第7页 
bq4024/bq4024Y  
128Kx16 Nonvolatile SRAM  
At t h is t im e t h e in t egr a l en er gy  
source is switched on to sustain the  
memory until after VCC returns valid.  
Features  
Data retention in the absence of  
General Description  
The CMOS bq4024 is a nonvolatile  
2,097,152-bit static RAM organized  
as 131,072 words by 16 bits. The  
integral control circuitry and lith-  
ium energy source provide reliable  
nonvolatility coupled with the un-  
lim it ed wr it e cycles of st a n da r d  
SRAM.  
power  
Th e bq4024 u ses ext r em ely low  
standby current CMOS SRAMs, cou-  
pled with small lithium coin cells to  
provide nonvolatility without long  
write-cycle times and the write-cycle  
limitations associated with EEPROM.  
Automatic write-protection dur-  
ing power-up/power-down cycles  
Industry-standard 40-pin 128K x  
16 pinout  
Conventional SRAM operation;  
The bq4024 requires no external cir-  
cuitry and is compatible with the  
industry-standard 2Mb SRAM pin-  
out.  
Th e con t r ol cir cu it r y con st a n t ly  
monitors the single 5V supply for  
a n ou t -of-t ole r a n ce con d it ion .  
When VCC falls out of tolerance, the  
SRAM is u n con dit ion a lly wr it e-  
protected to prevent an inadvertent  
write operation.  
unlimited write cycles  
10-year minimum data retention  
in absence of power  
Battery internally isolated until  
power is applied  
Pin Connections  
Pin Names  
Block Diagram  
A0–A16  
Address inputs  
V
NC  
CE  
40  
1
2
3
4
5
6
7
8
CC  
DQ0–DQ15 Data input/output  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
WE  
A
A
A
A
A
A
A
DQ  
15  
14  
13  
12  
11  
10  
16  
15  
14  
13  
12  
11  
10  
9
SS  
8
DQ  
DQ  
DQ  
DQ  
DQ  
CE  
Chip enable input  
Output enable input  
Write enable input  
No connect  
OE  
9
DQ  
DQ  
9
8
A
WE  
NC  
VCC  
VSS  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
V
A
V
SS  
DQ  
DQ  
DQ  
DQ  
DQ  
29  
28  
27  
26  
25  
24  
23  
22  
21  
7
6
5
4
3
A
7
A
A
5
A
6
+5 volt supply input  
Ground  
4
DQ  
DQ  
DQ  
A
3
A
2
1
0
2
A
1
A
OE  
0
40-Pin DIP Module  
PN402401.eps  
Selection Guide  
Maximum  
Access  
Negative  
Supply  
Maximum  
Access  
Negative  
Supply  
Part  
Part  
Number  
Time (ns)  
Tolerance  
Number  
Time (ns)  
Tolerance  
bq4024MA -85  
bq4024MA -120  
85  
-5%  
-5%  
bq4024YMA -85  
bq4024YMA -120  
85  
-10%  
-10%  
120  
120  
Sept. 1992  
1

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