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BP87C51FB PDF预览

BP87C51FB

更新时间: 2024-02-13 15:16:35
品牌 Logo 应用领域
英特尔 - INTEL 微控制器和处理器外围集成电路光电二极管可编程只读存储器时钟
页数 文件大小 规格书
18页 280K
描述
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

BP87C51FB 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:PLASTIC, DIP-40针数:40
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.8Is Samacsys:N
具有ADC:NO地址总线宽度:16
位大小:8CPU系列:8051
最大时钟频率:12 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:R-PDIP-T40长度:52.26 mm
I/O 线路数量:32端子数量:40
最高工作温度:125 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP40,.6
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V认证状态:Not Qualified
RAM(字节):256ROM(单词):32768
ROM可编程性:OTPROM座面最大高度:5.08 mm
速度:12 MHz子类别:Microcontrollers
最大压摆率:30 mA最大供电电压:6 V
最小供电电压:4 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:AUTOMOTIVE端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:15.24 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

BP87C51FB 数据手册

 浏览型号BP87C51FB的Datasheet PDF文件第4页浏览型号BP87C51FB的Datasheet PDF文件第5页浏览型号BP87C51FB的Datasheet PDF文件第6页浏览型号BP87C51FB的Datasheet PDF文件第8页浏览型号BP87C51FB的Datasheet PDF文件第9页浏览型号BP87C51FB的Datasheet PDF文件第10页 
AUTOMOTIVE 87C51FA/FB/FC/FC-20  
While the device is in ONCE Mode, the Port 0 pins  
float, and the other port pins and ALE and PSEN are  
weakly pulled high. The oscillator circuit remains ac-  
tive. While the 87C51FA/FB/FC is in this mode, an  
emulator or test CPU can be used to drive the circuit.  
Normal operation is restored when a normal reset is  
applied.  
DESIGN CONSIDERATION  
When the Idle mode is terminated by a hardware  
reset, the device normally resumes program execu-  
tion, from where it left off, up to two machine cycles  
before the internal reset algorithm takes control. On-  
chip hardware inhibits access to internal RAM in this  
event, but access to the port pins is not inhibited. To  
eliminate the possibility of an unexpected write when  
Idle is terminated by reset, the instruction following  
the one that invokes Idle should not be one that  
writes to a port pin or to external memory.  
RFI REDUCTION MODE  
The RFI reduction feature can be used only if exter-  
nal program memory is not required since this mode  
disables the ALE pin during instruction code fetches.  
By writing a logical one to the LSB of the Auxiliary  
Register (address 08EH), the ALE is disabled for in-  
struction code fetches and the output is weakly held  
high. When a logical zero is written, the ALE pin is  
enabled allowing it to generate the Address Latch  
Enable signal. This bit is cleared by reset. Once dis-  
abled, ALE remains disabled until it is reset by soft-  
ware or until a hardware reset occurs.  
ONCE MODE  
The ONCE (‘‘On-Circuit Emulation’’) Mode facilitates  
testing and debugging of systems using the  
87C51FA/FB/FC without removing it from the cir-  
cuit. The ONCE Mode is invoked by:  
1. Pull ALE low while the device is in reset and  
PSEN is high;  
2. Hold ALE low as RST is deactivated.  
Table 2. Status of the External Pins during Idle and Power Down  
Program  
Memory  
Mode  
Idle  
ALE  
PSEN  
PORT0  
PORT1  
PORT2  
PORT3  
Internal  
External  
Internal  
External  
1
1
0
0
1
1
0
0
Data  
Float  
Data  
Float  
Data  
Data  
Data  
Data  
Data  
Address  
Data  
Data  
Data  
Data  
Data  
Idle  
Power Down  
Power Down  
Data  
NOTE:  
For more detailed information on the reduced power modes refer to current Embedded Applications Handbook, and Applica-  
tion Note AP-252, ‘‘Designing with the 80C51BH.’’  
7

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