BLC9H10XS-500A
Power LDMOS transistor
Rev. 2 — 13 July 2018
Product data sheet
1. Product profile
1.1 General description
500 W LDMOS packaged asymmetric Doherty power transistor for base station
applications at frequencies from 617 MHz to 960 MHz.
Table 1.
Typical RF performance at Tcase = 25 °C in an asymmetrical Doherty demo circuit. VDS = 48 V;
Dq = 500 mA (main); VGS(amp)peak = 1.0 V; unless otherwise specified.
Typical performance 650 MHz
I
Test signal
f
VDS
(V)
48
PL(AV)
(dBm)
49.3
Gp
ηD
ACPR
(dBc)
29 [1]
(MHz)
(dB)
19.3
(%)
53
1-carrier W-CDMA
617 to 746
[1] Test signal: 1-carrier W-CDMA; 3GPP test model 1; 64 DPCH; PAR = 9.6 dB at 0.01 % probability on
CCDF.
Table 2.
Typical RF performance at Tcase = 25 °C in an asymmetrical Doherty test circuit. VDS = 48 V;
Dq = 500 mA (main); VGS(amp)peak = 0.5 V; unless otherwise specified.
Typical performance 800 MHz
I
Test signal
f
VDS
(V)
48
PL(AV)
(dBm)
49.3
Gp
ηD
ACPR
(dBc)
36 [1]
(MHz)
(dB)
18.6
(%)
52
1-carrier W-CDMA
791 to 821
[1] Test signal: 1-carrier W-CDMA; 3GPP test model 1; 64 DPCH; PAR = 9.6 dB at 0.01 % probability on
CCDF.
Table 3.
Typical RF performance at Tcase = 25 °C in an asymmetrical Doherty demo circuit. VDS = 48 V;
Dq = 280 mA (main); VGS(amp)peak = 0.4 V; unless otherwise specified.
Typical performance 960 MHz
I
Test signal
f
VDS
(V)
48
PL(AV)
(dBm)
49.3
Gp
ηD
ACPR
(MHz)
(dB)
17.4
(%)
51
(dBc)
31.1 [1]
1-carrier W-CDMA
925 to 960
[1] Test signal: 1-carrier W-CDMA; 3GPP test model 1; 64 DPCH; PAR = 9.6 dB at 0.01 % probability on
CCDF.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low thermal resistance providing excellent thermal stability
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent digital pre-distortion capability