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BFC237085223 PDF预览

BFC237085223

更新时间: 2024-02-18 12:59:50
品牌 Logo 应用领域
威世 - VISHAY 电容器
页数 文件大小 规格书
18页 196K
描述
CAPACITOR, METALLIZED FILM, POLYESTER, 100 V, 0.022 uF, THROUGH HOLE MOUNT, RADIAL LEADED, ROHS COMPLIANT

BFC237085223 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active包装说明:, 2810
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8532.25.00.70风险等级:0.69
Is Samacsys:N其他特性:RATED AC VOLTAGE(V) : 63
电容:0.022 µF电容器类型:FILM CAPACITOR
介电材料:POLYESTER高度:6.5 mm
JESD-609代码:e3长度:7.2 mm
安装特点:THROUGH HOLE MOUNT负容差:10%
端子数量:2最高工作温度:85 °C
最低工作温度:-55 °C封装形状:RECTANGULAR PACKAGE
封装形式:Radial包装方法:AMMO PACK
正容差:10%额定(AC)电压(URac):63 V
额定(直流)电压(URdc):100 V尺寸代码:2810
表面贴装:NO端子面层:Tin (Sn)
端子节距:5.08 mm端子形状:WIRE
宽度:2.5 mmBase Number Matches:1

BFC237085223 数据手册

 浏览型号BFC237085223的Datasheet PDF文件第11页浏览型号BFC237085223的Datasheet PDF文件第12页浏览型号BFC237085223的Datasheet PDF文件第13页浏览型号BFC237085223的Datasheet PDF文件第15页浏览型号BFC237085223的Datasheet PDF文件第16页浏览型号BFC237085223的Datasheet PDF文件第17页 
MKT370  
Vishay BCcomponents  
www.vishay.com  
APPLICATION NOTE AND LIMITING CONDITIONS  
These capacitors are not suitable for mains applications as across-the-line capacitors without additional protection, as  
described hereunder. These mains applications are strictly regulated in safety standards and therefore electromagnetic  
interference suppression capacitors conforming the standards must be used.  
For capacitors connected in parallel, normally the proof voltage and possibly the rated voltage must be reduced. For information  
depending of the capacitance value and the number of parallel connections contact: dc-film@vishay.com  
To select the capacitor for a certain application, the following conditions must be checked:  
1. The peak voltage (UP) shall not be greater than the rated DC voltage (URDC  
)
2. The peak-to-peak voltage (UP-P) shall not be greater than 22 x URAC to avoid the ionization inception level  
3. The voltage peak slope (dU/dt) shall not exceed the rated voltage pulse slope in an RC-circuit at rated voltage and without  
ringing. If the pulse voltage is lower than the rated DC voltage, the rated voltage pulse slope may be multiplied by URDC and  
divided by the applied voltage.  
For all other pulses following equation must be fulfilled:  
T
------- 2 x dt URDC x -------  
dU  
dt  
dU  
2 x   
dt  
rated  
0
T is the pulse duration.  
4. The maximum component surface temperature rise must be lower than the limits (see figure max. allowed component  
temperature rise).  
5. Since in circuits used at voltages over 280 V peak-to-peak the risk for an intrinsically active flammability after a capacitor  
breakdown (short circuit) increases, it is recommended that the power to the component is limited to 100 times the values  
mentioned in the table: “Heat conductivity”  
6. When using these capacitors as across-the-line capacitor in the input filter for mains applications or as series connected  
with an impedance to the mains the applicant must guarantee that the following conditions are fulfilled in any case (spikes  
and surge voltages from the mains included).  
VOLTAGE CONDITIONS FOR 6 ABOVE  
85 °C < Tamb 100 °C FOR 63 V  
ALLOWED VOLTAGES  
Tamb 85 °C  
85 °C < Tamb 105 °C FOR > 63 V  
See “Max. AC voltage as function  
of temperature CBB952” per characteristics  
Maximum continuous RMS voltage  
URAC  
Maximum temperature RMS-overvoltage (< 24 h)  
Maximum peak voltage (VO-P) (< 2 s)  
1.25 x URAC  
1.6 x URDC  
URAC  
1.3 x URDC  
EXAMPLE  
C = 330 nF - 63 V used for the voltage signal shown in next drawing.  
U
P-P = 40 V; UP = 35 V; T1 = 100 μs; T2 = 200 μs  
The ambient temperature is 35 °C  
Checking conditions:  
1. The peak voltage UP = 35 V is lower than 63 VDC  
2. The peak-to-peak voltage 40 V is lower than 22 x 40 VAC = 113 UP-P  
3. The voltage pulse slope (dU/dt) = 40 V/100 μs = 0.4 V/μs  
This is lower than 60 V/μs (see specific reference data for each version)  
4. The dissipated power is 16.2 mW as calculated with fourier terms  
The temperature rise for Wmax. = 3.5 mm and pitch = 5 mm will be 16.2 mW/3.0 mW/°C = 5.4 °C  
This is lower than 15 °C temperature rise at 35 °C, according figure max. allowed component temperature rise  
5. Not applicable  
6. Not applicable  
Voltage Signal  
Voltage  
UP  
UP-P  
Time  
T1  
T2  
Revision: 29-Jun-16  
Document Number: 28108  
14  
For technical questions, contact: dc-film@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  

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