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BD99010EFV-M, BD99011EFV-M
Operational Notes
1.
Absolute maximum ratings
Exceeding the absolute maximum rating for supply voltage, operating temperature or other parameters can result in
damages to or destruction of the chip. In this event it also becomes impossible to determine the cause of the damage
(e.g. short circuit, open circuit, etc). Therefore, if any special mode is being considered with values expected to
exceed the absolute maximum ratings, implementing physical safety measures, such as adding fuses, should be
considered.
2.
3.
4.
GND electric potential
Keep the GND terminal potential at the lowest (minimum) potential under any operating condition. Furthermore,
excluding the SW pin, the voltage of all pin should never drop below that of GND. In case there is a pin with a voltage
lower than GND implement countermeasures such as using a bypass route.
Power dissipation
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. Therefore allow for sufficient margins to ensure use within the power
dissipation rating.
Input power supply
Concerning the input pins VIN and PVIN, the layout pattern should be as short as possible and free from electrical
interferences. In case the impedance of the input supply line is large, the resulting voltage drop at high load situation
and low supply voltage will cause repeated UVLO cycles sometimes referred to as “chattering”. Therefore, the
impedance of the input line should be so small that the worst case voltage drop is smaller than the UVLO hysteresis.
To prevent damage to or destruction of the chip, the input filter which can be contain 0.5V/μs against the voltage of
VIN and PNIN should be considered.
5.
6.
Electrical characteristics
The electrical characteristics given in this specification may be influenced by conditions such as temperature, supply
voltage and external components. Transient characteristics should be sufficiently verified.
Thermal shutdown (TSD)
This IC incorporates and integrated thermal shutdown circuit to prevent heat damage to the IC. Normal operation
should be within the power dissipation rating, if however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise and the TSD circuit will be activated and turn all output pins OFF. After the Tj falls below the
TSD threshold the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
7.
8.
Inter-pin shorting and mounting errors
Ensure that when mounting the IC on the PCB the direction and position are correct. Incorrect mounting may result in
damaging the IC. Also, shorts caused by dust entering between the output, input and GND pin may result in
damaging the IC.
In some applications, the VIN and pin potential might be reversed, possibly resulting in circuit internal damage or
damage to the elements. For example, while the external capacitor is charged, the VIN shorts to the GND. For the
REG and REG_L output pin use a capacitor with a capacitance with less than 100μF. We also recommend using
reverse polarity diodes in series or a bypass diode between all pins and the VBAT pin.
Figure 47.
9.
Operation in strong electromagnetic fields
Use caution when operating in the presence of strong electromagnetic fields, as this may cause the IC to malfunction.
10. In applications where the output pin is connected to a large inductive load, a counter-EMF (electromotive force) might
occur at startup or shutdown. A diode should be added for protection.
www.rohm.com
TSZ02201-0W1W0AL00030-1-2
07.Jul.2014 Rev.003
© 2013 ROHM Co., Ltd. All rights reserved.
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