BD66FM6452A
BLDC Motor Flash MCU with Gate-Driver
Table Program Example..............................................................................................................31
In Circuit Programming – ICP .....................................................................................................32
On-Chip Debug Support – OCDS ...............................................................................................32
In Application Programming – IAP ..............................................................................................33
Data Memory .......................................................................................................49
Structure......................................................................................................................................49
Data Memory Addressing............................................................................................................50
General Purpose Data Memory ..................................................................................................50
Special Purpose Data Memory ...................................................................................................50
Special Function Register Description.............................................................52
Indirect Addressing Registers – IAR0, IAR1, IAR2 .....................................................................52
Memory Pointers – MP0, MP1L, MP1H, MP2L, MP2H...............................................................52
Accumulator – ACC.....................................................................................................................53
Program Counter Low Byte Register – PCL................................................................................54
Look-up Table Registers – TBLP, TBHP, TBLH...........................................................................54
Status Register – STATUS..........................................................................................................54
EEPROM Data Memory.......................................................................................56
EEPROM Data Memory Structure ..............................................................................................56
EEPROM Registers ....................................................................................................................56
Read Operation from the EEPROM............................................................................................58
Page Erase Operation to the EEPROM......................................................................................59
Write Operation to the EEPROM ................................................................................................59
Write Protection...........................................................................................................................61
EEPROM Interrupt ......................................................................................................................61
Programming Considerations......................................................................................................61
Oscillators ...........................................................................................................64
Oscillator Overview .....................................................................................................................64
System Clock Configurations......................................................................................................64
Internal High Speed RC Oscillator – HIRC .................................................................................65
Internal 32kHz Oscillator – LIRC.................................................................................................65
Operating Modes and System Clocks ..............................................................65
System Clocks ............................................................................................................................65
System Operation Modes............................................................................................................66
Control Registers ........................................................................................................................67
Operating Mode Switching..........................................................................................................69
Standby Current Considerations.................................................................................................72
Wake-up......................................................................................................................................72
Watchdog Timer..................................................................................................73
Watchdog Timer Clock Source....................................................................................................73
Watchdog Timer Control Register...............................................................................................73
Watchdog Timer Operation .........................................................................................................74
Reset and Initialisation.......................................................................................75
Reset Functions ..........................................................................................................................75
Reset Initial Conditions ...............................................................................................................78
Rev. 1.00
3
October 12, 2023
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