Datasheet > BD616LV4017ACP70

BD616LV4017ACP70

更新时间： 2022-12-20 01:52:28

品牌	Logo	应用领域
BSI		静态存储器
页数	文件大小	规格书
10页	267K
描述
Very Low Power/Voltage CMOS SRAM 256K X 16 bit

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数据手册

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BD616LV4017ACP70 数据手册

BSI

BS616LV4017

PIN DESCRIPTIONS

Name

Function

A0-A17 Address Input

These 18 address inputs select one of the 262,144 x 16-bit words in the RAM.

CE Chip Enable Input

WE Write Enable Input

CE is active LOW. Chip enables must be active when data read from or write to the

device. if chip enable is not active, the device is deselected and is in a standby power

mode. The DQ pins will be in the high impedance state when the device is deselected.

The write enable input is active LOW and controls read and write operations. With the

chip selected, when WE is HIGH and OE is LOW, output data will be present on the

DQ pins; when WE is LOW, the data present on the DQ pins will be written into the

selected memory location.

OE Output Enable Input

The output enable input is active LOW. If the output enable is active while the chip is

selected and the write enable is inactive, data will be present on the DQ pins and they

will be enabled. The DQ pins will be in the high impedance state when OE is inactive.

Lower byte and upper byte data input/output control pins.

LB and UB Data Byte Control Input

DQ0 - DQ15 Data Input/Output

Ports

These 16 bi-directional ports are used to read data from or write data into the RAM.

Vcc

Power Supply

Ground

Gnd

TRUTH TABLE

MODE

D0~D7

High Z

Dout

D8~D15

Vcc CURRENT

_CCSB, I_CCSB1

Not selected

(Power Down)

High Z

Dout

High Z

Din

I_CCSB, I_CCSB1

I_CC

Output Disabled

Read

High Z

Dout

Din

Write

Din

Revision 2.1

Jan. 2004

R0201-BS616LV4017

123 4 5 6 7...10

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