Datasheet > BCM43362KUBG

BCM43362KUBG

更新时间： 2024-02-03 12:46:25

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		电信电信集成电路
页数	文件大小	规格书
60页	5201K
描述
Telecom Circuit, 1-Func, CMOS, PBGA69, WLBGA-69

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技术参数
数据手册

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BCM43362KUBG 技术参数

生命周期：	Obsolete	包装说明：	VFBGA,
Reach Compliance Code：	unknown	ECCN代码：	5A992.C
HTS代码：	8542.31.00.01	风险等级：	5.82
JESD-30 代码：	R-PBGA-B69	长度：	4.52 mm
功能数量：	1	端子数量：	69
最高工作温度：	85 °C	最低工作温度：	-30 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	VFBGA
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
座面最大高度：	0.55 mm	标称供电电压：	1.2 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	OTHER
端子形式：	BALL	端子节距：	0.4 mm
端子位置：	BOTTOM	宽度：	2.92 mm
Base Number Matches：	1

BCM43362KUBG 数据手册

CYW43362

1. Overview

1.1 Overview

The Cypress CYW43362 provides the highest level of integration for a mobile or handheld wireless system, with integrated

IEEE 802.11 b/g/n. It provides a small form-factor solution with minimal external components to drive down cost for mass volumes

and allows for handheld device flexibility in size, form, and function. The CYW43362 is designed to address the needs of highly

mobile devices that require minimal power consumption and reliable operation.

Figure 2 shows the interconnect of all the major physical blocks in the CYW43362 and their associated external interfaces, which

are described in greater detail in the following sections.

Figure 2. CYW43362 Block Diagram

SWREG

Power

supply

LDO

PMU Ctrl

SLEEP CLK

LPO

Dedicated

crystal or TCXO

XTAL OSC

TCXO signal shared

with BT/FM/GPS chip

Always ON

Buffer

WL_RST_N

POR

SDIOD

gSPI

SDIO/SPI

WDog timer

OTP

GPIO

UART

JTAG

UART

JTAG

ARM processor

(Int)

RAM

(240 KB)

ROM

(448 KB)

BT COEX

EXT LNA/RF

Switch Control

1.2 Standards Compliance

The CYW43362 supports the following standards:

■

IEEE 802.11n

802.11b

802.11g

802.11d

Document No. 002-14779 Rev. *G

Page 5 of 60

1 2 3 456 7 8...60

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