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BA7062FE2 PDF预览

BA7062FE2

更新时间: 2024-01-11 08:49:34
品牌 Logo 应用领域
罗姆 - ROHM 光电二极管商用集成电路
页数 文件大小 规格书
8页 101K
描述
SYNC SEPARATOR IC, PDSO8, SOP-8

BA7062FE2 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:LSOP,针数:8
Reach Compliance Code:unknown风险等级:5.48
Is Samacsys:N其他特性:BUILT-IN AFC CIRCUIT
商用集成电路类型:SYNC SEPARATOR ICJESD-30 代码:R-PDSO-G8
JESD-609代码:e3/e2长度:5 mm
端子数量:8最高工作温度:75 °C
最低工作温度:-20 °C封装主体材料:PLASTIC/EPOXY
封装代码:LSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
表面贴装:YES温度等级:COMMERCIAL EXTENDED
端子面层:TIN/TIN COPPER端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:10宽度:4.4 mm
Base Number Matches:1

BA7062FE2 数据手册

 浏览型号BA7062FE2的Datasheet PDF文件第2页浏览型号BA7062FE2的Datasheet PDF文件第3页浏览型号BA7062FE2的Datasheet PDF文件第4页浏览型号BA7062FE2的Datasheet PDF文件第6页浏览型号BA7062FE2的Datasheet PDF文件第7页浏览型号BA7062FE2的Datasheet PDF文件第8页 
Multimedia ICs  
BA7062F  
Application example  
R2  
C2  
R3  
VCC = 5V  
470k  
R1  
130k  
10k  
C3  
C4  
VCC = 5V  
C5  
C6  
+
+
100p  
47µ  
0.022µ  
PHASE  
COMP  
1
2
3
4
H.OSC  
8
7
6
5
1µ  
10k  
HD  
SYNC  
VD  
C1  
R4  
Vsig  
SYNC  
SEPA  
+
1µ  
330  
R5  
470k  
V.SEPA  
C7  
R2 470k  
VCC  
By configuring the circuit enclosed in the dotted line to that in the  
diagram on the right, you can decrease the lock-in time and increase  
the capture range.  
+
C3-1  
0.47µ  
R3  
10k  
8
+
C2  
2200p  
C3-2  
0.47µ  
Fig. 9  
• When SYNC SEPA output only is used. HD and VD unused.  
VCC = 5V  
R1  
VCC = 5V  
C5  
C6  
+
120k  
47µ  
0.022µ  
PHASE  
COMP  
1
2
3
4
8
7
6
5
H.OSC  
10k  
HD  
SYNC  
VD  
C1  
R4  
Vsig  
SYNC  
SEPA  
+
1µ  
330  
R5  
470k  
V.SEPA  
C7  
Fig. 10  
(1) Connect pin 1 to GND via a 120k(approx.) resistor. Leave pins 2, 4 and 8 open.  
(2) SYNC output polarity (pin 3) is positive.  
(3) The delay time for rising edge of the SYNC output (pin 3) with respect to the falling edge of Sync for the Vsig  
input signal (pin 6) is 850ns (reference value).  
(4) The delay time for falling edge of the SYNC output (pin 3) with respect to the rising edge of Sync for the Vsig  
input signal (pin 6) is 450ns (reference value).  
Attached components  
Resistor R1 should have a tolerance of ± 2%, and a temperature coefficient of 100ppm or lower.  
5

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