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ATXMEGA256A3B-MHR PDF预览

ATXMEGA256A3B-MHR

更新时间: 2024-02-27 14:00:01
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟微控制器外围集成电路闪存
页数 文件大小 规格书
109页 3339K
描述
RISC Microcontroller, 16-Bit, FLASH, AVR RISC CPU, 32MHz, CMOS, 9 X 9 MM, 1 MM HEIGHT, 0.50 MM PITCH, MLF-64

ATXMEGA256A3B-MHR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended包装说明:9 X 9 MM, 1 MM HEIGHT, 0.50 MM PITCH, MLF-64
Reach Compliance Code:compliantFactory Lead Time:7 weeks
风险等级:5.49具有ADC:YES
地址总线宽度:位大小:16
最大时钟频率:32 MHzDAC 通道:YES
DMA 通道:YES外部数据总线宽度:
JESD-30 代码:S-XQCC-N64JESD-609代码:e4
长度:9 mmI/O 线路数量:49
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
ROM可编程性:FLASH座面最大高度:1 mm
速度:32 MHz最大供电电压:3.6 V
最小供电电压:1.6 V标称供电电压:2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:9 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER, RISC

ATXMEGA256A3B-MHR 数据手册

 浏览型号ATXMEGA256A3B-MHR的Datasheet PDF文件第1页浏览型号ATXMEGA256A3B-MHR的Datasheet PDF文件第2页浏览型号ATXMEGA256A3B-MHR的Datasheet PDF文件第3页浏览型号ATXMEGA256A3B-MHR的Datasheet PDF文件第5页浏览型号ATXMEGA256A3B-MHR的Datasheet PDF文件第6页浏览型号ATXMEGA256A3B-MHR的Datasheet PDF文件第7页 
XMEGA A3B  
3. Overview  
The XMEGAA3B is a family of low power, high performance and peripheral rich CMOS 8/16-bit  
microcontrollers based on the AVR® enhanced RISC architecture. By executing powerful  
instructions in a single clock cycle, the XMEGA A3B achieves throughputs approaching 1 Million  
Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power con-  
sumption versus processing speed.  
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the  
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent  
registers to be accessed in one single instruction, executed in one clock cycle. The resulting  
architecture is more code efficient while achieving throughputs many times faster than conven-  
tional single-accumulator or CISC based microcontrollers.  
The XMEGA A3B devices provides the following features: In-System Programmable Flash with  
Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,  
eight-channel Event System, Programmable Multi-level Interrupt Controller, 49 general purpose  
I/O lines, 32-bit Real Time Counter (RTC) with Battery Backup System, seven flexible 16-bit  
Timer/Counters with compare modes and PWM, six USARTs, two Two Wire Serial Interfaces  
(TWIs), two Serial Peripheral Interfaces (SPIs), AES and DES crypto engine, two 8-channel, 12-  
bit ADCs with optional differential input with programmable gain, one 2-channel 12-bit DAC, four  
analog comparators with window mode, programmable Watchdog Timer with separate Internal  
Oscillator, accurate internal oscillators with PLL and prescaler and programmable Brown-Out  
Detection.  
The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,  
is available. The devices also have an IEEE std. 1149.1 compliant JTAG test interface, and this  
can also be used for On-chip Debug and programming.  
The XMEGA A3B devices have five software selectable power saving modes. The Idle mode  
stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and  
all peripherals to continue functioning. The Power-down mode saves the SRAM and register  
contents but stops the oscillators, disabling all other functions until the next TWI or pin-change  
interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,  
allowing the application to maintain a timer base while the rest of the device is sleeping. In  
Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is  
sleeping. This allows very fast start-up from external crystal combined with low power consump-  
tion. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue  
to run. To further reduce power consumption, the peripheral clock to each individual peripheral  
can optionally be stopped in Active mode and Idle sleep mode.  
The device is manufactured using Atmel's high-density nonvolatile memory technology. The pro-  
gram Flash memory can be reprogrammed in-system through the PDI or JTAG. A Bootloader  
running in the device can use any interface to download the application program to the Flash  
memory. The Bootloader software in the Boot Flash section will continue to run while the Appli-  
cation Flash section is updated, providing true Read-While-Write operation. By combining an  
8/16-bit RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA A3B is a pow-  
erful microcontroller family that provides a highly flexible and cost effective solution for many  
embedded applications.  
4
Not recommended for new designs -  
8116J–AVR–06/2013  
Use ATxmega256A3BU  
 

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