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ATXMEGA128B3-ANR PDF预览

ATXMEGA128B3-ANR

更新时间: 2022-09-29 11:46:13
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
144页 6297K
描述
IC MCU 8BIT 128KB FLASH 100TQFP

ATXMEGA128B3-ANR 数据手册

 浏览型号ATXMEGA128B3-ANR的Datasheet PDF文件第6页浏览型号ATXMEGA128B3-ANR的Datasheet PDF文件第7页浏览型号ATXMEGA128B3-ANR的Datasheet PDF文件第8页浏览型号ATXMEGA128B3-ANR的Datasheet PDF文件第10页浏览型号ATXMEGA128B3-ANR的Datasheet PDF文件第11页浏览型号ATXMEGA128B3-ANR的Datasheet PDF文件第12页 
6.  
AVR CPU  
6.1  
Features  
z 8/16-bit, high-performance Atmel AVR RISC CPU  
z 142 instructions  
z Hardware multiplier  
z 32x8-bit registers directly connected to the ALU  
z Stack in RAM  
z Stack pointer accessible in I/O memory space  
z Direct addressing of up to 16MB of program memory and 16MB of data memory  
z True 16/24-bit access to 16/24-bit I/O registers  
z Efficient support for 8-, 16-, and 32-bit arithmetic  
z Configuration change protection of system-critical features  
6.2  
6.3  
Overview  
All AVR XMEGA devices use the 8/16-bit AVR CPU. The main function of the CPU is to execute the code and perform all  
calculations. The CPU is able to access memories, perform calculations, control peripherals, and execute the program in  
the flash memory. Interrupt handling is described in a separate section, refer to “Interrupts and Programmable Multilevel  
Interrupt Controller” on page 29.  
Architectural Overview  
In order to maximize performance and parallelism, the AVR CPU uses a Harvard architecture with separate memories  
and buses for program and data. Instructions in the program memory are executed with single-level pipelining. While one  
instruction is being executed, the next instruction is pre-fetched from the program memory. This enables instructions to  
be executed on every clock cycle. For details of all AVR instructions, refer to http://www.atmel.com/avr.  
Figure 6-1. Block Diagram of the AVR CPU architecture.  
XMEGA B3 [DATASHEET]  
Atmel-8074E-AVR-ATxmega 128B3 - 64B3_Datasheet–09/2014  
9

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