BUFFER TO MAIN MEMORY PAGE PROGRAM WITHOUT BUILT-IN ERASE: A
previously erased page within main memory can be programmed with the contents of
either buffer 1 or buffer 2. To start the operation, an 8-bit opcode, 88H for buffer 1 or
89H for buffer 2, must be followed by the one reserved bit, 13 address bits (PA12 - PA0)
that specify the page in the main memory to be written, and ten additional don’t care
bits. When a low-to-high transition occurs on the CS pin, the part will program the data
stored in the buffer into the specified page in the main memory. It is necessary that the
page in main memory that is being programmed has been previously erased. The pro-
gramming of the page is internally self-timed and should take place in a maximum time
of tP. During this time, the status register will indicate that the part is busy.
Successive page programming operations without doing a page erase are not recom-
mended. In other words, changing bytes within a page from a “1” to a “0” during multiple
page programming operations without erasing that page is not recommended.
PAGE ERASE: The optional Page Erase command can be used to individually erase
any page in the main memory array allowing the Buffer to Main Memory Page Program
without Built-in Erase command to be utilized at a later time. To perform a Page Erase,
an opcode of 81H must be loaded into the device, followed by one reserved bit,
13 address bits (PA12 - PA0), and ten don’t care bits. The 13 address bits are used to
specify which page of the memory array is to be erased. When a low-to-high transition
occurs on the CS pin, the part will erase the selected page to 1s. The erase operation is
internally self-timed and should take place in a maximum time of tPE. During this time,
the status register will indicate that the part is busy.
BLOCK ERASE: A block of eight pages can be erased at one time allowing the Buffer
to Main Memory Page Program without Built-in Erase command to be utilized to reduce
programming times when writing large amounts of data to the device. To perform a
Block Erase, an opcode of 50H must be loaded into the device, followed by one
reserved bit, ten address bits (PA12 - PA3), and 13 don’t care bits. The ten address bits
are used to specify which block of eight pages is to be erased. When a low-to-high tran-
sition occurs on the CS pin, the part will erase the selected block of eight pages to 1s.
The erase operation is internally self-timed and should take place in a maximum time of
tBE. During this time, the status register will indicate that the part is busy.
Block Erase Addressing
PA12
PA11
PA10
PA9
PA8
0
PA7
0
PA6
0
PA5
0
PA4
0
PA3
0
PA2
X
PA1
X
PA0
X
Block
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
2
3
0
0
0
0
0
0
1
X
X
X
0
0
0
0
0
1
0
X
X
X
0
0
0
0
0
1
1
X
X
X
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
1020
1021
1022
1023
6
AT45DB321B
2223D–DFLASH–10/02
5秒后页面跳转
STM32H743技术深度剖析与应用案例探索
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
74HC14芯片资料介绍：性能特性分析、引脚介绍
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
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