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ATSAM3108B

更新时间： 2024-02-22 07:25:32
品牌 Logo 应用领域
爱特美尔 - ATMEL 消费电路商用集成电路异步传输模式ATM
页数 文件大小 规格书
23页 311K
描述
Audio Processing

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ATSAM3108B 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：LFQFP,针数：64
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PQFP-G64
长度：10 mm功能数量：1
端子数量：64最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH认证状态：Not Qualified
座面最大高度：1.6 mm最大供电电压 (Vsup)：1.95 V
最小供电电压 (Vsup)：1.65 V表面贴装：YES
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
宽度：10 mmBase Number Matches：1

ATSAM3108B 数据手册

 浏览型号ATSAM3108B的Datasheet PDF文件第4页浏览型号ATSAM3108B的Datasheet PDF文件第5页浏览型号ATSAM3108B的Datasheet PDF文件第6页浏览型号ATSAM3108B的Datasheet PDF文件第8页浏览型号ATSAM3108B的Datasheet PDF文件第9页浏览型号ATSAM3108B的Datasheet PDF文件第10页 
ATSAM3108B  
Table 6-1.  
Pin Name  
SMC  
Pinout by Pin Name (Continued)  
Sharin  
g
Pin Number  
Type  
Description  
SmartMedia configuration. This pin is sensed after power-up. If found  
low, it is assumed that a SmartMedia connector is present. The built-in  
firmware will wait for SmartMedia SMPD.  
1
In  
4
P0.12  
RD  
1
2
In  
In  
4
5
General-purpose input pin  
Slave 8-bit interface read, active low. D7 - D0 data is output when RD  
goes low and CS is low  
R|B  
2
2
In  
In  
5
5
SmartMedia Ready Busy/ status  
General-purpose input pin  
P0.13  
Slave 8-bit interface interrupt request. High when data is ready to be  
transferred from chip to host. Reset by a read from host (CS = 0 and RD  
= 0)  
IRQ  
8
Out  
6
SMRE  
FS0  
8
8
Out  
In  
6
6
SmartMedia read enable (RE), active low  
Frequency sense, sensed at power up. Together with FS1, allows the  
firmware to know the operating frequency of the chip (see FS1).  
P0.8  
8
8
I/O  
Out  
In  
6
6
7
7
7
8
General-purpose I/O pin  
INT  
Serial slave synchronous interface data request, active low.  
Serial MIDI in  
MIDI_IN  
P0.14  
SDIN  
9
9
In  
General-purpose input pin  
9
In  
Serial slave synchronous interface input data  
Serial MIDI out  
MIDI_OUT  
10  
Out  
Frequency sense, sensed at power up. FS1/FS0 allow firmware to know  
operating frequency of chip as follows:  
00  
01  
10  
11  
6.9552 MHz  
9.6 MHz  
11.2896 MHz  
12.288 MHz  
FS1  
10  
In  
8
P0.9  
10  
I/O  
8
-
General-purpose I/O  
DABD3 - 0  
42, 41, 40, 39  
Out  
Four stereo channels of digital audio output, I2S format  
Audio bit clock for DABD3 - 0. Audio bit clock for DAAD3 - 0 if the  
corresponding CLAD3 - 0 is not used.  
CLBD  
6
7
Out  
Out  
-
-
Audio left/right channel select for DABD3 - 0. Audio left/right channel for  
DAAD3 - 0 if the corresponding WSAD3 - 0 is not used.  
WSBD  
External DAC/Codec master clock. Same frequency as X2 pin. Can be  
programmed to be 128xFs, 192xFs, 256xFs, 384xFs, where Fs is the  
DAC/Codec sampling rate.  
CKOUT  
5
Out  
-
Stereo audio data input, I2S format. Can operate on CLBD master rate  
or CLAD0 external rate when sampling rate conversion is requested.  
DAAD0  
P0.15  
34  
34  
In  
In  
9
9
General-purpose input pin  
Three additional channels of stereo audio input, I2S format. Can  
individually operate on CLBD master rate or corresponding CLAD3 - 1  
when sampling rate conversion is requested.  
In  
Pd  
DAAD3 - 1  
38, 37, 35  
-
DAAD3 - 1 have built-in pull-downs. They may be left open if not used.  
7
6092C–DRMSD–12-Feb-07  
1...45678910...23

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