Datasheet > ATF22LV10CZ(CQZ)

ATF22LV10CZ(CQZ)

更新时间： 2024-01-18 19:58:07

品牌	Logo	应用领域
其他 - ETC		可编程逻辑器件
页数	文件大小	规格书
13页	290K
描述
ATF22LV10CZ(CQZ) [Updated 9/01. 13 Pages] 500 gate. wide 3V to 5.5V supply range. zero power electrically erasable PLD. 24 pins

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技术参数
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ATF22LV10CZ(CQZ) 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.59
Base Number Matches：	1

ATF22LV10CZ(CQZ) 数据手册

ATF22LV10C(Q)Z

Input Test Waveforms and

Measurement Levels

Output Test Loads

Note:

Similar competitors devices are specified with slightly

different loads. These load differences may affect output

signals’ delay and slew rate. Atmel devices are tested

with sufficient margins to meet compatible device specifi-

cation conditions.

Pin Capacitance

f = 1 MHz, T = 25°C⁽¹⁾

Typ

Max

Units

Conditions

V_IN= 0V

C_IN

C_I/O

V_OUT= 0V

Notes: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

Power-up Reset

Electronic Signature Word

There are 64 bits of programmable memory that are always

available to the user, even if the device is secured. These

bits can be used for user-specific data.

The registers in the ATF22LV10CZ/CQZ are designed to

reset during power-up. At a point delayed slightly from V_CC

crossing V_RST, all registers will be reset to the low state.

The output state will depend on the polarity of the buffer.

This feature is critical for state machine initialization.

However, due to the asynchronous nature of reset and the

uncertainty of how V_CCactually rises in the system, the

following conditions are required:

Security Fuse Usage

A single fuse is provided to prevent unauthorized copying

of the ATF22LV10CZ/CQZ fuse patterns. Once pro-

grammed, fuse verify and preload are inhibited. However,

the 64-bit User Signature remains accessible.

1. The V_CCrise must be monotonic and start

below 0.7V.

The security fuse should be programmed last, as its effect

is immediate.

2. The clock must remain stable during T_PR

3. After T_PR, all input and feedback setup times must

be met before driving the clock pin high.

Programming/Erasing

Programming/erasing is performed using standard

PLD programmers. See CMOS PLD Programming

Hardware & Software Support for information on software/

programming.

Preload of Register Outputs

The ATF22LV10CZ/CQZ’s registers are provided with cir-

cuitry to allow loading of each register with either a high or

a low. This feature will simplify testing since any state can

be forced into the registers to control test sequencing. A

JEDEC file with preload is generated when a source file

with vectors is compiled. Once downloaded, the JEDEC file

preload sequence will be done automatically by most of the

approved programmers after the programming.

Parameter Description

Typ

Max

Units

T_PR

Power-up

600

1000

Reset Time

V_RST

Power-up

2.3

2.7

Reset Voltage

1 2 3 456 7 8...13

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与ATF22LV10CZ(CQZ)相关器件

型号	品牌	获取价格	描述	数据表
ATF22LV10CZ_05	ATMEL	获取价格	Highperformance EE PLD
ATF22LV10CZ_10	ATMEL	获取价格	High-performance Electrically Erasable Programmable Logic Device
ATF22LV10CZ_14	ATMEL	获取价格	Lowest Power in Its Class
ATF22LV10CZ-15DC	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, CDIP24
ATF22LV10CZ-15DI	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, CDIP24
ATF22LV10CZ-15DM	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, CDIP24, 0.300 INCH, WINDOWED, CERDIP-24
ATF22LV10CZ-15JC	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, PQCC28
ATF22LV10CZ-15JI	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, PQCC28, PLASTIC, MO-047AB, JLCC-28
ATF22LV10CZ-15JJ	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, PQCC28, PLASTIC, MO-047AB, JLCC-28
ATF22LV10CZ-15JL	MICROCHIP	获取价格	Flash PLD, 15ns, CMOS, PQCC28, PLASTIC, MO-047AB, JLCC-28

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