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ATF16V8BQ-10PC PDF预览

ATF16V8BQ-10PC

更新时间: 2024-01-02 00:35:13
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存可编程逻辑器件光电二极管输入元件异步传输模式ATM时钟
页数 文件大小 规格书
17页 639K
描述
High- Performance Flash PLD

ATF16V8BQ-10PC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153AC, TSSOP-20
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.77
架构:PAL-TYPE最大时钟频率:68 MHz
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm湿度敏感等级:2
专用输入次数:8I/O 线路数量:8
输入次数:18输出次数:8
产品条款数:64端子数量:20
最高工作温度:70 °C最低工作温度:
组织:8 DEDICATED INPUTS, 8 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:5 V可编程逻辑类型:FLASH PLD
传播延迟:10 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Programmable Logic Devices
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

ATF16V8BQ-10PC 数据手册

 浏览型号ATF16V8BQ-10PC的Datasheet PDF文件第4页浏览型号ATF16V8BQ-10PC的Datasheet PDF文件第5页浏览型号ATF16V8BQ-10PC的Datasheet PDF文件第6页浏览型号ATF16V8BQ-10PC的Datasheet PDF文件第8页浏览型号ATF16V8BQ-10PC的Datasheet PDF文件第9页浏览型号ATF16V8BQ-10PC的Datasheet PDF文件第10页 
ATF16V8B  
In simple mode all feedback paths of the output pins are  
routed via the adjacent pins. In doing so, the two inner most  
pins (pins 15 and 16) will not have the feedback option as  
these pins are always configured as dedicated combinato-  
rial output.  
Macrocell Configuration  
Software compilers support the three different OMC  
modes as different device types. Most compilers have the  
ability to automatically select the device type, generally  
based on the register usage and output enable (OE) usage.  
Register usage on the device forces the software to choose  
the registered mode. All combinatorial outputs with OE  
controlled by the product term will force the software to  
choose the complex mode. The software will choose the  
simple mode only when all outputs are dedicated combina-  
torial without OE control. The different device types can be  
used to override the automatic device selection by the soft-  
ware. For further details, refer to the compiler software  
manuals.  
ATF16V8B Registered Mode  
PAL Device Emulation / PAL Replacement  
The registered mode is used if one or more registers are  
required. Each macrocell can be configured as either a reg-  
istered or combinatorial output or I/O, or as an input. For a  
registered output or I/O, the output is enabled by the OE  
pin, and the register is clocked by the CLK pin. Eight prod-  
uct terms are allocated to the sum term. For a combinato-  
rial output or I/O, the output enable is controlled by a  
product term, and seven product terms are allocated to the  
sum term. When the macrocell is configured as an input,  
the output enable is permanently disabled.  
When using compiler software to configure the device, the  
user must pay special attention to the following restrictions  
in each mode.  
In registered mode pin 1 and pin 11 are permanently con-  
figured as clock and output enable, respectively. These  
pins cannot be configured as dedicated inputs in the regis-  
tered mode.  
Any register usage will make the compiler select this mode.  
The following registered devices can be emulated using  
this mode:  
In complex mode pin 1 and pin 11 become dedicated  
inputs and use the feedback paths of pin 19 and pin 12  
respectively. Because of this feedback path usage, pin 19  
and pin 12 do not have the feedback option in this mode.  
16R8 16RP8  
16R6 16RP6  
16R4 16RP4  
Registered Configuration for  
Registered Mode(1)(2)  
Combinatorial Configuration for  
Registered Mode(1)(2)  
Notes: 1. Pin 1 cotrols common CLK for the registered out-  
puts. Pin 11 controls common OE for the registered  
outputs. Pin 1 and Pin 11 are permanently config-  
ured as CLK and OE.  
Notes: 1. Pin 1 and Pin 11 are permanently configured as  
CLK and OE.  
2. The development software configures all the archi-  
tecture control bits and checks for proper pin usage  
automatically.  
2. The development software configures all the archi-  
tecture control bits and checks for proper pin usage  
automatically.  
7

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