Datasheet > ATF1504AS-20JI68

ATF1504AS-20JI68

更新时间： 2022-12-01 19:20:56

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ATF1504AS-20JI68 数据手册

ATF1504AS(L)

Block Diagram

I/O (MC64)/GCLK3

Unused product terms are automatically disabled by the compiler to decrease power

consumption. A security fuse, when programmed, protects the contents of the

ATF1504AS. Two bytes (16 bits) of User Signature are accessible to the user for pur-

poses such as storing project name, part number, revision or date. The User Signature

is accessible regardless of the state of the security fuse.

The ATF1504AS device is an in-system programmable (ISP) device. It uses the indus-

try-standard 4-pin JTAG interface (IEEE Std. 1149.1), and is fully-compliant with JTAG’s

Boundary-scan Description Language (BSDL). ISP allows the device to be programmed

without removing it from the printed circuit board. In addition to simplifying the manufac-

turing flow, ISP also allows design modifications to be made in the field via software.

0950O–PLD–7/05

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型号	品牌	描述	获取价格	数据表
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ATF1504AS-7AL100	ATMEL	EE PLD, 7.5ns, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MS-026AED, TQFP-1	获取价格
ATF1504AS-7AL44	ATMEL	EE PLD, 7.5ns, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026ACB, TQFP-44	获取价格
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ATF1504AS-7AX44	MICROCHIP	IC CPLD 64MC 7.5NS 44TQFP	获取价格