Datasheet > ATF1504AEL-15CC100

ATF1504AEL-15CC100

更新时间： 2022-12-02 00:17:53

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
73页	1713K
描述
EE PLD, 15ns, PBGA100, 1 MM PITCH, TBGA-100

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ATF1504AEL-15CC100 数据手册

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Features

• 2nd Generation EE Complex Programmable Logic Devices

– 3.0V to 3.6V Operating Range with I/Os 3.3 or 5V Compliant

– 32 - 512 Macrocells with Enhanced Features

– Pin-compatible with Industry-standard Devices

– Speeds to 5 ns Maximum Pin-to-pin Delay

– Registered Operation to 225 MHz

• Enhanced Macrocells with Logic Doubling^™Features

– Bury Either Register or COM while Using the Other for Output

– Dual Independent Feedback Allows Multiple Latch Functions per Macrocell

– 5 Product Terms per Macrocell, Expandable to 40 per Macrocell with Cascade

Logic, Plus 15 More with Foldback Logic

– D/T/Latch Configurable Flip-flops plus Transparent Latches

– Global and/or per Macrocell Register Control Signals

– Global and/or per Macrocell Output Enable

– Programmable Output Slew Rate per Macrocell

– Programmable Output Open Collector Option per Macrocell

– Fast Registered Input from Product Term

• Enhanced Connectivity

ATF15xxAE

Family

Datasheet

ATF1502AE(L)

ATF1504AE(L)

ATF1508AE(L)

ATF1516AE(L)

ATF1532AE(L)

– Single Level Switch Matrix for Maximum Routing Options

– Up to 40 Inputs per Logic Block

• Advanced Power Management Features

– ITD (Input Transition Detection) Available Individually on Global Clocks, Inputs

and I/O for µA Level Standby Current on “L” versions

– Pin-controlled 1 mA Standby Mode

– Reduced-power per Macrocell

– Automatic Power Down of Unused Macrocells

– Programmable Pin-keeper Inputs and I/Os

• Available in Commercial and Industrial Temperature Ranges

• Available in All Popular Packages Including PLCC, PQFP, TQFP and BGA

• EE Technology

– 100% Tested

– Completely Reprogrammable

– 10,000 Program/Erase Cycles

Preliminary

– 20 Year Data Retention

– 2000V ESD Protection

– 200 mA Latch-up Immunity

• JTAG Boundary-scan Testing Port per IEEE 1149.1-1990 and 1149.1a-1993

– Pull-up Option on JTAG Pins TMS and TDI

• IEEE 1532 Compatibility for Fast In-System Programmability (ISP) via JTAG

• PCI-compliant

• Security Fuse Feature

Rev. 2398B–08/01

12 3 4 5 6 7...73

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