Via N. Lorenzi 8 - I 16152 GENOVA - ITALY
Tel. int. +39/(0)10 6556549 - (0)10 6556488
Fax Int. +39/(0)10 6442510
Ansaldo Trasporti s.p.a.
Unita' Semiconduttori
ANSALDO
Tx 270318 ANSUSE I -
FAST SWITCHING THYRISTOR ATF1040
Repetitive voltage up to
2000 V
1075 A
14 kA
Mean on-state current
Surge current
FINAL SPECIFICATION
Turn-off time
50 µs
mag 97 - ISSUE : 06
Tj
[°C]
Symbol
Characteristic
Conditions
Value
Unit
BLOCKING
V RRM
V RSM
V DRM
I RRM
I DRM
Repetitive peak reverse voltage
Non-repetitive peak reverse voltage
Repetitive peak off-state voltage
Repetitive peak reverse current
Repetitive peak off-state current
125 2000
125 2100
125 2000
V
V
V
V=VRRM
V=VDRM
125
125
150
150
mA
mA
CONDUCTING
I T (AV)
I T (AV)
I TSM
I² t
Mean on-state current
Mean on-state current
Surge on-state current, non repetitive
I² t
180° sin, 50 Hz,Th=55°C, double side cooled
180° sin, 1 kHz,Th=55°C, double side cooled
sine wave, 10 ms
1075
1000
14
A
A
125
kA
without reverse voltage
980 x1E3
2.6
A²s
V
V T
On-state voltage
On-state current =
2000 A
25
V T(TO)
r T
Threshold voltage
125
1.40
V
On-state slope resistance
125 0.414
mohm
SWITCHING
di/dt
dv/dt
td
Critical rate of rise of on-state current, min
Critical rate of rise of off-state voltage, min
Gate controlled delay time, typical
From 75% VDRM up to 1200 A, gate 10V 5 ohm
Linear ramp up to 70% of VDRM
125
125
25
500
500
0.6
50
A/µs
V/µs
µs
VD=100V, gate source 20V, 10 ohm , tr=1 µs
tq
Circuit commutated turn-off time
di/dt = 20 A/µs, I = 800
dV/dt = 200 V/µs , up to 75% VDRM
di/dt = 60 A/µs, I = 1000
VR = 50
A
125
µs
Q rr
I rr
I H
Reverse recovery charge
Peak reverse recovery current
Holding current, typical
A
125
620
227
500
850
µC
A
V
VD=5V, gate open circuit
VD=5V, tp=30µs
25
25
mA
mA
I L
Latching current, typical
GATE
V GT
Gate trigger voltage
VD=5V
25
25
125
25
25
25
25
25
3.5
350
0.25
30
V
mA
V
I GT
Gate trigger current
VD=5V
V GD
V FGM
Non-trigger gate voltage, min.
Peak gate voltage (forward)
Peak gate current
VD=VDRM
V
I
FGM
10
A
V RGM
P GM
Peak gate voltage (reverse)
Peak gate power dissipation
Average gate power dissipation
5
V
Pulse width 100 µs
150
3
W
W
P G(AV)
MOUNTING
R th(j-h)
Thermal impedance, DC
Operating junction temperature
Mounting force
Junction to heatsink, double side cooled
26
°C/kW
°C
T j
-30 / 125
14.0 / 17.0
500
F
kN
Mass
g
tq code
D 10 µs C 12 µs B 15 µs A 20 µs L 25 µs
M 30 µs N 35 µs P 40 µs R 45 µs S 50 µs
T 60 µs U 70 µs W 80 µs X 100µs Y 150µs
tq code
ORDERING INFORMATION : ATF1040 S 20 S
VDRM&VRRM/100
standard specification