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ATA6622C PDF预览

ATA6622C

更新时间: 2023-12-06 20:02:45
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
29页 1019K
描述
Fully integrated LIN specification 2.0, 2.1 and SAEJ2602-compliant transceiver with a low-drop vol

ATA6622C 数据手册

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4.2  
Silent Mode  
A falling edge at EN when TXD is high switches the IC into Silent Mode. The TXD Signal has to be logic high during the  
Mode Select window (see Figure 4-2). The transmission path is disabled in Silent Mode. The overall supply current from VBatt  
is a combination of the IVSsi = 57µA plus the VCC regulator output current IVCC  
.
The internal slave termination between the LIN pin and the VS pin is disabled in Silent Mode, only a weak pull-up current  
(typically 10µA) between the LIN pin and the VS pin is present. Silent Mode can be activated independently from the actual  
level on the LIN, WAKE, or KL_15 pins.  
If an undervoltage condition occurs, NRES is switched to low, and the IC changes its state to Fail-safe Mode.  
A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LIN receiver and switches on the  
internal slave termination between the LIN pin and the VS pin.  
Figure 4-2. Switch to Silent Mode  
Normal Mode  
Silent Mode  
EN  
Mode select window  
TXD  
td = 3.2μs  
NRES  
VCC  
LIN  
Delay time silent mode  
td_silent maximum 20μs  
LIN switches directly to recessive mode  
8
ATA6622C/ATA6624C/ATA6626C [DATASHEET]  
4986O–AUTO–10/14  

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