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ATA6620_06 PDF预览

ATA6620_06

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
爱特美尔 - ATMEL 总线收发器稳压器
页数 文件大小 规格书
20页 326K
描述
LIN Bus Transceiver with Integrated Voltage Regulator

ATA6620_06 数据手册

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ATA6620  
3. Functional Description  
3.1  
Supply Pin (VS)  
LIN operating voltage is VS = 5V to 18V. An undervoltage detection is implemented to disable  
transmission if VS falls below 5V, in order to avoid false bus messages. After switching on VS,  
the IC starts with the Pre-normal mode and the voltage regulator is switched on (that is,  
5V/50 mA output capability).  
The supply current in Sleep mode is typically 10 µA and 40 µA in Silent mode.  
3.2  
3.3  
Ground Pin (GND)  
The IC is neutral on the LIN pin in case of GND disconnection. It is able to handle a ground shift  
up to 3V for supply voltage above 9V at the VS pin.  
Voltage Regulator Output Pin (VCC)  
The internal 5V voltage regulator is capable of driving loads with up to 50 mA, supplying the  
microcontroller and other ICs on the PCB. It is protected against overload by means of current  
limitation and overtemperature shut-down. Furthermore, the output voltage is monitored and will  
cause a reset signal at the NRES output pin if it drops below a defined threshold Vthun  
.
3.4  
3.5  
Undervoltage Reset Output (NRES)  
This push-pull output is supplied from the VCC voltage. If the VCC voltage falls below the under-  
voltage detection threshold of Vthun, NRES switches to low after tres_f (Figure 4-6 on page 9).  
Even if VCC = 0V the NRES stays low, because it is internally driven from the VS voltage. If VS  
voltage ramps down, NRES stays low until VS < 1.5V and then becomes highly resistant.  
The implemented undervoltage delay keeps NRES low for tReset = 10 ms after VCC reaches its  
nominal value.  
Bus Pin (LIN)  
A low-side driver with internal current limitation and thermal shutdown, as well as an internal  
pull-up resistor according to LIN specification 2.0 is implemented. The voltage range is from  
–40V to +60V. This pin exhibits no reverse current from the LIN bus to VS, even in the case of a  
GND shift or VBatt disconnection. The LIN receiver thresholds are compatible with the LIN proto-  
col specification.  
The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are  
slope controlled. The output has a short-circuit limitation. This is a self-adapting current limita-  
tion; that is, during current limitation, as the chip temperature increases, the current decreases.  
3.6  
Input Pin (TXD)  
This pin is the microcontroller interface to control the state of the LIN output. TXD must be pulled  
to ground in order to drive the LIN bus low. If TXD is high or unconnected (internal pull-up resis-  
tor), the LIN output transistor is turned off and the bus is in the recessive state.  
3
4850D–AUTO–02/06  

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