AT91SAM7S256 Summary Preliminary
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Selectable mode fault detection
Maximum frequency at up to Master Clock
Two-wire Interface
USART
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Master Mode only
Compatibility with standard two-wire serial memories
One, two or three bytes for slave address
Sequential read/write operations
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Programmable Baud Rate Generator
5- to 9-bit full-duplex synchronous or asynchronous serial communications
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1, 1.5 or 2 stop bits in Asynchronous Mode
1 or 2 stop bits in Synchronous Mode
Parity generation and error detection
Framing error detection, overrun error detection
MSB or LSB first
Optional break generation and detection
By 8 or by 16 over-sampling receiver frequency
Hardware handshaking RTS - CTS
Modem Signals Management DTR-DSR-DCD-RI on USART1
Receiver time-out and transmitter timeguard
Multi-drop Mode with address generation and detection
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RS485 with driver control signal
ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
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NACK handling, error counter with repetition and iteration limit
IrDA modulation and demodulation
Communication at up to 115.2 Kbps
Test Modes
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Remote Loopback, Local Loopback, Automatic Echo
Serial Synchronous
Controller
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Provides serial synchronous communication links used in audio and telecom
applications
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Contains an independent receiver and transmitter and a common clock divider
Offers a configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection
of different event on the frame sync signal
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Receiver and transmitter include a data signal, a clock signal and a frame
synchronization signal
Timer Counter
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Three 16-bit Timer Counter Channels
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Three output compare or two input capture
Wide range of functions including:
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Frequency measurement
Event counting
Interval measurement
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6117AS–ATARM–20-Oct-04