Datasheet > AT89C51CC03_06

AT89C51CC03_06

更新时间： 2024-02-13 13:36:42

品牌	Logo	应用领域
爱特美尔 - ATMEL		闪存控制器
页数	文件大小	规格书
197页	2279K
描述
Enhanced 8-bit MCU with CAN Controller and Flash Memory

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

AT89C51CC03_06 数据手册

Features

• 80C51 Core Architecture

• 256 Bytes of On-chip RAM

• 2048 Bytes of On-chip ERAM

• 64K Bytes of On-chip Flash Memory

– Data Retention: 10 Years at 85°C

– Read/Write Cycle: 100K

• 2K Bytes of On-chip Flash for Bootloader

• 2K Bytes of On-chip EEPROM

Read/Write Cycle: 100K

• Integrated Power Monitor (POR: PFD) To Supervise Internal Power Supply

• 14-sources 4-level Interrupts

• Three 16-bit Timers/Counters

• Full Duplex UART Compatible 80C51

• High-speed Architecture

Enhanced 8-bit

MCU with CAN

Controller and

Flash Memory

– In Standard Mode:

40 MHz (Vcc 3V to 5.5V, both Internal and external code execution)

60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)

– In X2 mode (6 Clocks/machine cycle)

20 MHz (Vcc 3V to 5.5V, both Internal and external code execution)

30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)

• Five Ports: 32 + 4 Digital I/O Lines

AT89C51CC03

• Five-channel 16-bit PCA with

– PWM (8-bit)

– High-speed Output

– Timer and Edge Capture

• Double Data Pointer

• 21-bit WatchDog Timer (7 Programmable Bits)

• A 10-bit Resolution Analog to Digital Converter (ADC) with 8 Multiplexed Inputs

• SPI Interface, (PLCC52, VPFP64 and CABGA 64 packages only)

• Full CAN Controller

– Fully Compliant with CAN Rev 2.0A and 2.0B

– Optimized Structure for Communication Management (Via SFR)

– 15 Independent Message Objects

– Each Message Object Programmable on Transmission or Reception

– Individual Tag and Mask Filters up to 29-bit Identifier/Channel

– 8-byte Cyclic Data Register (FIFO)/Message Object

– 16-bit Status and Control Register/Message Object

– 16-bit Time-Stamping Register/Message Object

– CAN Specification 2.0 Part A or 2.0 Part B Programmable for Each Message

Object

– Access to Message Object Control and Data Registers Via SFR

– Programmable Reception Buffer Length Up To 15 Message Objects

– Priority Management of Reception of Hits on Several Message Objects at the

Same Time (Basic CAN Feature)

– Priority Management for Transmission

– Message Object Overrun Interrupt

– Supports

– Time Triggered Communication

– Autobaud and Listening Mode

– Programmable Automatic Reply Mode

– 1-Mbit/s Maximum Transfer Rate at 8 MHz ⁽¹⁾Crystal Frequency in X2 Mode

– Readable Error Counters

– Programmable Link to On-chip Timer for Time Stamping and Network

Synchronization

– Independent Baud Rate Prescaler

– Data, Remote, Error and Overload Frame Handling

Rev. 4182K–CAN–05/06

At BRP = 1 sampling point will be fixed.

12 3 4 5 6 7...197

中文翻译

下载PDF

与AT89C51CC03_06相关器件

型号	品牌	获取价格	描述	数据表
AT89C51CC03_08	ATMEL	获取价格	CAN Microcontrollers
AT89C51CC03_14	ATMEL	获取价格	PCA â Incorect Behavior with CPU X2 Mode Bi
AT89C51CC03C_14	ATMEL	获取价格	PCA â Incorect Behavior with CPU X2 Mode Bi
AT89C51CC03C-7CTIM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory
AT89C51CC03CA-7CTUM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory
AT89C51CC03CA-RDTUM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory
AT89C51CC03CA-RDTZM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory
AT89C51CC03CA-RLTUM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory
AT89C51CC03CA-RLTZM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory
AT89C51CC03CA-S3SUM	ATMEL	获取价格	Enhanced 8-bit MCU with CAN Controller and Flash Memory

与AT89C51CC03_06相关文章

BSS138LT3G：一款高效能N沟道MOSFET的全面解析
2024-07-04

15
解读EGP10B二极管资料手册：产品特性、参数分析
2024-07-04

13
RT9164AGG手册资料详解：引脚信息、设计指南
2024-07-04

13
2SA1037KPT资料详解：产品特性、电气参数、设计指南
2024-07-04

16

产品中心

服务支持

精选活动

关于我们

帮助中心

AT89C51CC03_06

AT89C51CC03_06 数据手册

与AT89C51CC03_06相关器件

与AT89C51CC03_06相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

AT89C51CC03_06

AT89C51CC03_06 数据手册

与AT89C51CC03_06相关器件

与AT89C51CC03_06相关文章

您还可以找

您在本页遇到什么问题？