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AT88SC0104CA-SH PDF预览

AT88SC0104CA-SH

更新时间: 2024-01-17 20:39:53
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
66页 664K
描述
Atmel CryptoMemory Specification Datasheet

AT88SC0104CA-SH 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:WAFERReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.75JESD-30 代码:X-XUUC-N
JESD-609代码:e3内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:1
功能数量:1字数:1024 words
字数代码:1000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1KX1封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
串行总线类型:I2C最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:NO LEAD端子位置:UPPER
处于峰值回流温度下的最长时间:NOT SPECIFIED

AT88SC0104CA-SH 数据手册

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4.  
Pin Description  
4.1  
Supply Voltage (VCC)  
The VCC input is a 2.7V to 3.6V positive voltage supplied by the host.  
4.2  
4.3  
Clock (SCL/CLK)  
In the asynchronous T=0 protocol, the SCL/CLK input is used to provide the device with a carrier frequency f. The nominal  
length of one bit emitted on I/O is defined as an "elementary time unit" (etu) and is equal to 372/ f. When the synchronous  
protocol is used, the SCL/CLK input is used to clock data in on the positive clock edge and clock data out on the negative  
clock edge.  
Serial Data (SDA/IO)  
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wired with any number of other  
open drain or open collector devices. An external pull up resistor should be connected between SDA and VCC, a nominal value  
of 4.7K ohm may be used. The value of this resistor and the system capacitance loading the SDA bus will determine the rise  
time of SDA. This rise time will determine the maximum frequency during read operations. Low value pull up resistors will  
allow higher frequency operations while drawing higher average power supply current.  
4.4  
Reset (RST)  
CryptoMemory provides an ISO 7816-3 compliant asynchronous Answer-To-Reset (ATR) sequence. When the reset  
sequence is activated, the device will output the data programmed into the 64-bit ATR register. When RST is low, all internal  
logic, access rights and write cycles are in reset, except the asynchronous mode activation flag. A weak internal pull-up on the  
RST input pad allows the device to be used in synchronous mode without bonding RST. For synchronous only smart card  
applications an external pull-up on RST is recommended to ensure synchronous operation under any system timings or  
conditions. CryptoMemory does not support a synchronous answer to reset sequence. The RST input is not available in the  
plastic package options for CryptoMemory.  
Figure 4-1. Connection Diagram  
2.7v - 5.5v  
2.7v - 3.6v  
Microprocessor  
CryptoMemory  
SDA  
SCL  
Note:  
While the Atmel CryptoMemory AT88SCXXXXCA is a low voltage device (2.7V to 3.6V) its I/O buffers are  
designed for standard high voltage applications (2.7V to 5.5V)  
Atmel AT88SC0104CA/0204CA/0404CA/0808CA [Datasheet]  
7
8664ECRYPTO12/11  
 
 
 
 
 

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