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AT88SC0104CA-MJ88SC0104 PDF预览

AT88SC0104CA-MJ88SC0104

更新时间： 2024-01-13 16:32:30
品牌 Logo 应用领域
爱特美尔 - ATMEL 内存集成电路
页数 文件大小 规格书
23页 679K
描述
Memory Circuit, 128X8

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AT88SC0104CA-MJ88SC0104 技术参数

生命周期：Transferred包装说明：DIMM,
Reach Compliance Code：unknownHTS代码：8542.32.00.71
风险等级：5.33JESD-30 代码：R-XQMA-N
内存密度：1024 bit内存集成电路类型：MEMORY CIRCUIT
内存宽度：8功能数量：1
字数：128 words字数代码：128
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：128X8
封装主体材料：UNSPECIFIED封装代码：DIMM
封装形状：RECTANGULAR封装形式：MICROELECTRONIC ASSEMBLY
认证状态：Not Qualified最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：NO LEAD
端子位置：QUAD

AT88SC0104CA-MJ88SC0104 数据手册

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6. Pin Descriptions  
6.1  
Supply Voltage (VCC)  
The VCC input is a 2.7V to 3.6V positive voltage supplied by the host.  
6.2  
Clock (SCL/CLK)  
When using the asynchronous T = 0 protocol, the CLK (SCL) input provides the device with a  
carrier frequency f. The nominal length of one bit emitted on I/O is defined as an “elementary  
time unit” (ETU) and is equal to 372/f.  
When using the synchronous protocol, data clocking is done on the positive edge of the clock  
when writing to the device and on the negative edge of the clock when reading from the device.  
6.3  
6.4  
Reset (RST)  
The AT88SC0104CA provides an ISO 7816-3 compliant asynchronous Answer-To-Reset (ATR)  
sequence. Upon activation of the reset sequence, the device outputs bytes contained in the 64-  
bit Answer-To-Reset register. An internal pull-up on the RST input pad allows the device to oper-  
ate in synchronous mode without bonding RST. The AT88SC0104CA does not support an  
Answer-To-Reset sequence in the synchronous mode of operation.  
Serial Data (SDA/IO)  
The SDA/IO pin is bidirectional for serial data transfer. This pin is open-drain driven and may be  
wired with any number of other open-drain or open-collector devices. An external pull-up resistor  
should be connected between SDA/IO and VCC. The value of this resistor and the system capac-  
itance loading the SDA/IO bus will determine the rise time of SDA/IO. This rise time will  
determine the maximum frequency during read operations. Low value pull-up resistors will allow  
higher frequency operations while drawing higher average power supply current. SDA/IO infor-  
mation applies to both asynchronous and synchronous protocols.  
4
AT88SC0104CA  
5200CS–CRYPT–5/09  
1234567...23

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