AT88SA10HS

更新时间： 2024-02-18 08:53:03

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
23页	584K
描述
CryptoAuthentication™ Host Security Chip

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技术参数
数据手册

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AT88SA10HS 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	SOT-23	包装说明：	TSSOP,
针数：	3	Reach Compliance Code：	unknown
HTS代码：	8542.31.00.01	风险等级：	5.82
Is Samacsys：	N	具有ADC：	NO
地址总线宽度：		DAC 通道：	NO
DMA 通道：	NO	外部数据总线宽度：
JESD-30 代码：	R-PDSO-G3	长度：	2.9 mm
I/O 线路数量：		端子数量：	3
最高工作温度：	85 °C	最低工作温度：	-40 °C
PWM 通道：	NO	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	认证状态：	Not Qualified
ROM可编程性：	FLASH	座面最大高度：	1.12 mm
最大供电电压：	5.25 V	最小供电电压：	2.7 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.95 mm	端子位置：	DUAL
宽度：	1.3 mm	uPs/uCs/外围集成电路类型：	MICROCONTROLLER
Base Number Matches：	1

AT88SA10HS 数据手册

1.6.

Security Features

The AT88SA10HS incorporates a number of physical security features designed to protect the keys from release.

These include an active shield over the entire surface of the part, internal memory encryption, internal clock generation,

glitch protection, voltage tamper detection and other physical design features.

Pre-programmed keys stored on the AT88SA10HS are encrypted in such a way as to make retrieval of their values via

outside analysis very difficult.

Both the clock and logic supply voltage are internally generated, preventing any direct attack via the pins on these two

signals.

IO Protocol

Communications to and from the AT88SA10HS take place over a single asynchronously timed wire using a pulse count

scheme. The overall communications structure is a hierarchy:

Table 2.

IO Hierarchy

Tokens

Implement a single data bit transmitted on the bus, or the wake-up event.

Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any)

which may be transmitted.

Flags

Data following the command and transmit flags. They incorporate both a byte count and a checksum to

ensure proper data transmission.

Blocks

Packets

Bytes forming the core of the block without the count and CRC. They are either the input or output

parameters of the AT88SA10HS command or status information from the AT88SA10HS.

Refer to Applications Notes on Atmel’s website for more details on how to use any microprocessor to easily generate

the signaling necessary to send these values to the chip.

2.1.

IO Tokens

There are a number of IO tokens that may be transmitted along the bus:

Input: (To AT88SA10HS)

Wake

Zero

One

Wake the AT88SA10HS up from sleep (low power) state

Send a single bit from system to the AT88SA10HS with a value of 0

Send a single bit from system to the AT88SA10HS with a value of 1

Output: (From AT88SA10HS)

ZeroOut Send a single bit from the AT88SA10HS to the system with a value of 0

OneOut Send a single bit from the AT88SA10HS to the system with a value of 1

The waveforms are the same in either direction, however there are some differences in timing based on the

expectation that the host has a very accurate and consistent clock while the AT88SA10HS has significant variation in

its internal clock generator due to normal manufacturing and environmental fluctuations.

The bit timings are designed to permit a standard UART running at 230.4K baud to transmit and receive the tokens

efficiently. Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by the

AT88SA10HS. Refer to Applications Notes on Atmel’s website for more details.

AT88SA10HS Host Authentication Chip [Preliminary]

8595B–SMEM–09/09

1 2 345 6 7...23

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与AT88SA10HS相关器件

型号	品牌	描述	获取价格	数据表
AT88SA10HS_10	ATMEL	Atmel CryptoAuthentication Host Security Chip	获取价格
AT88SA10HS_11	ATMEL	Atmel CryptoAuthentication Host Security Chip	获取价格
AT88SA10HS-SH-T	ATMEL	Atmel CryptoAuthentication Host Security Chip	获取价格
AT88SA10HS-TH-T	ATMEL	Atmel CryptoAuthentication Host Security Chip	获取价格
AT88SA10HS-TSU-T	ATMEL	Atmel CryptoAuthentication Host Security Chip	获取价格
AT88SC0104C	ATMEL	CRYPTOMEMORY 1KBIT	获取价格

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