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AT88SA10HS_10 PDF预览

AT88SA10HS_10

更新时间: 2022-03-03 23:03:53
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
23页 276K
描述
Atmel CryptoAuthentication Host Security Chip

AT88SA10HS_10 数据手册

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Features  
Secure key storage to complement Atmel AT88SA100S and Atmel AT88SA102S  
Devices  
Superior SHA-256 Hash Algorithm  
Guaranteed Unique 48-bit Serial Number  
High speed single wire interface, optionally shared with client  
Supply Voltage: 2.7 – 5.25V  
1.8V – 5.5V communications voltage  
<100nA Sleep Current  
Atmel  
CryptoAuthentication  
Host Security Chip  
4KV ESD protection  
Multi-level hardware security  
Secure personalization  
Green compliant (exceeds RoHS) 3-pin SOT-23 and 8-pin TSSOP or SOIC packages  
Atmel AT88SA10HS  
Applications  
Consumable device (battery, toner, other supplies) authentication  
Network & Computer Access control  
Authenticated communications for control networks  
Anti-clone authentication for daughter cards  
Physical access control (electronic lock & key)  
1.  
Introduction  
The Atmel® CryptoAuthenticationfamily of chips is the first cost-effective  
authentication devices to implement the SHA-256 hash algorithm, which is part of  
the latest set of recommended algorithms by the US Government. The 256-bit key  
space renders any exhaustive attacks impossible.  
The Atmel AT88SA10HS host version of CryptoAuthentication chips is capable of  
validating the response coming from the SHA-256 engine within an authentic  
CryptoAuthentication client (SA100S or SA102S), even if that response includes  
within the computation the serial number of the client. For detailed information on  
the cryptographic protocols, algorithm test values and usage models refer to “Atmel  
AT88SA100S” and “Atmel AT88SA102S” Datasheets, along with the application  
notes dedicated to this product family.  
The host CryptoAuthentication performs three separate operations (named HOST0,  
HOST1 & HOST2) to implement this validation. The AT88SA10HS chip takes both  
the challenge and response as inputs and returns a single Boolean indicating  
whether or not the response is valid, in order to prevent the host chip from being  
used to model a valid client.  
The host system is responsible for generating the random challenge that is sent to  
both the client and host CryptoAuthentication devices as AT88SA10HS does not  
include a random number generator.  
Note:  
The chip implements a failsafe internal watchdog timer that forces it into a very low  
power mode after a certain time interval regardless of any current activity. System  
programming must take this into consideration. Refer to Section 4.5 for more details.  
8595F–SMEM–8/10  

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