5.1.1 Command Timing
After a command flag is transmitted, a command block should be sent to the chip. During parsing of the parameters and
subsequent execution of a properly received command, the chip will be busy and not respond to transitions on the signal pin.
The delays for these operations are listed in the table below:
Table 5-2. Command Timing (Guaranteed by design; not tested)
Parameter
Symbol
Max
Unit
Notes
ParsingDelay
100
Delay to check CRC and parse opcode and parameters before an
error indication will be available
µs
t PARSE
MemoryDelay
FuseDelay
3
ms
Delay to execute Read, Write and/or SramLock commands
t EXEC_MEM
t EXEC_FUSE
700
Delay to execute BurnFuse command
See Section 6.3 for more details
µs
MacDelay
30
13
ms
ms
Delay to execute MAC command
t EXEC_MAC
t PERSON
PersonalizeDelay
Delay to execute GenPersonalizationKey or LoadSram
In this document, tEXEC is used as shorthand for the delay corresponding to whatever command has been sent to the chip.
5.1.2 Transmit Flag
The Transmit flag is used to turn around the signal so that the AT88SA100S can send data back to the system, depending on
its current state. The bytes that the AT88SA100S returns to the system, depending on its current state as follows:
Table 5-3. Return Codes
State Description
Error/Status
Description
After Wake, but prior
to first command
0x11
Indication that a proper Wake token has been received by the AT88SA100S.
After successful
command execution
–
Return bytes per “Output Parameters” in Section 6, Commands of this document.
In some cases this is a single byte with a value of 0x00 indicating success. The
Transmit flag can be resent to the AT88SA100S repeatedly if a re-read of the
output is necessary.
Execution error
0x0F
0xFF
Command was properly received but could not be executed by the AT88SA100S
chip. Changes in the AT88SA100S chip state or the value of the command bits
must happen before it is re-attempted.
After CRC or other
parsing error
Command was not properly received by AT88SA100S and should be re-issued
by the system.
The AT88SA100S always transmits complete blocks to the system, so in the above table the status/error bytes result in 4-
bytes going to the system – count, error, CRC x 2.
After receipt of a command block, the AT88SA100S will parse the command for errors, a process which takes tPARSE (See
Section 5.1.1). After this interval the system can send a transmit token to the AT88SA100S – if there was an error then the
AT88SA100S will respond with an error code. If there is no error then the AT88SA100S internally transitions automatically
from tPARSE to tEXEC and will not respond to any Transmit tokens until both delays are complete.
5.1.3 Sleep Flag
The sleep flag is used to transition the AT88SA100S to the low power state, which causes a complete reset of the
AT88SA100S’ internal command engine and input/output buffer. It can be sent to the AT88SA100S at any time when the
AT88SA100S will accept a flag.
Atmel AT88SA100S [DATASHEET]
9
8558F−CRYPTO−9/11