Datasheet > AT25010AY1-10YI-2.7

AT25010AY1-10YI-2.7

更新时间： 2024-11-20 03:17:19

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
20页	580K
描述
EEPROM, 128X8, Serial, CMOS, 4.90 X 3 MM, MAP-8

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Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

– Data Sheet Describes Mode 0 Operation

• Low-voltage and Standard-voltage Operation

– 2.7 (V_CC= 2.7V to 5.5V)

– 1.8 (V_CC= 1.8V to 5.5V)

• 20 MHz Clock Rate (5V)

• 8-byte Page Mode

• Block Write Protection

– Protect 1/4, 1/2, or Entire Array

• Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software

Data Protection

• Self-timed Write Cycle (5 ms max)

• High Reliability

– Endurance: One Million Write Cycles

– Data Retention: 100 Years

• Automotive Grade, Extended Temperature and Lead-free/Halogen-free Devices

Available

SPI Serial

EEPROMs

1K (128x8)

2K (256x8)

• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages

4K (512x8)

Description

AT25010A

AT25020A

AT25040A

The AT25010A/020A/040A provides 1024/2048/4096 bits of serial electrically eras-

able programmable read-only memory (EEPROM) organized as 128/256/512 words of

8 bits each. The device is optimized for use in many industrial and commercial appli-

cations where low-power and low-voltage operation are essential. The

AT25010A/020A/040A is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC,

8-lead MAP, and 8-lead TSSOP packages.

The AT25010A/020A/040A is enabled through the Chip Select pin (CS) and accessed

via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO),

and Serial Clock (SCK). All programming cycles are completely self-timed, and no

separate erase cycle is required before write.

Block write protection is enabled by programming the status register with one of four

blocks of write protection. Separate Program Enable and Program disable instructions

are provided for additional data protection. Hardware data protection is provided via

the WP pin to protect against inadvertent write attempts. The HOLD pin may be used

to suspend any serial communication without resetting the serial sequence.

Table 1. Pin Configuration

8-lead SOIC

8-lead PDIP

Pin Name

Function

Chip Select

VCC

HOLD

SCK

VCC

HOLD

SCK

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

GND

8-lead MAP

VCC 8 1 CS

8-lead TSSOP

GND

VCC

HOLD

SCK

Power Supply

Write Protect

HOLD 7

SCK 6

SI 5

2 SO

3 WP

4 GND

GND

HOLD

Suspends Serial Input

Bottom view

3348H–SEEPR–9/04

12 3 4 5 6 7...20

中文翻译

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AT25010B-MAHL-T	MICROCHIP	获取价格	IC EEPROM 1KBIT 20MHZ 8UDFN
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