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ASM1832S

更新时间： 2025-07-28 06:38:07
品牌 Logo 应用领域
PULSECORE 电源电路电源管理电路微处理器复位电路光电二极管监控输入元件
页数 文件大小 规格书
9页 198K
描述
3.3V μP Power Supply Monitor and Reset Circuit

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中文翻译

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ASM1832S 技术参数

是否Rohs认证：不符合生命周期：Transferred
包装说明：SOP-8Reach Compliance Code：unknown
风险等级：5.77Is Samacsys：N
其他特性：MANUAL RESET INPUT可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e0长度：4.9 mm
信道数量：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.91 mmBase Number Matches：1

ASM1832S 数据手册

 浏览型号ASM1832S的Datasheet PDF文件第2页浏览型号ASM1832S的Datasheet PDF文件第3页浏览型号ASM1832S的Datasheet PDF文件第4页浏览型号ASM1832S的Datasheet PDF文件第5页浏览型号ASM1832S的Datasheet PDF文件第6页浏览型号ASM1832S的Datasheet PDF文件第7页 
October 2006  
rev 1.6  
ASM1832  
3.3V µP Power Supply Monitor and Reset Circuit  
Devices are available in 8-pin PDIP, 8-pin SO and compact 8-  
pin MicroSO packages.  
General Description  
The ASM1832 is a fully integrated microprocessor supervisor. It  
can halt and restart a “hung-up” microprocessor, restart a  
microprocessor after a power failure. It has a watchdog timer  
and external reset override. RESET and RESET outputs are  
push-pull.  
Key Features  
•
•
•
•
•
3.3V supply monitor  
Push-pull output  
Selectable watchdog period  
Debounce manual push-button reset input  
Precision temperature-compensated voltage reference  
and comparator.  
A
precision temperature-compensated reference and  
comparator circuits monitor the 3.3V, VCC input voltage status.  
During power-up or when the VCC power supply falls outside  
•
•
•
•
•
•
Power-up, power-down and brown out detection  
250ms minimum reset time  
selectable tolerance limits, both RESET and RESET become  
active. When VCC rises above the threshold voltage, the reset  
Active LOW and HIGH reset signal  
Selectable trip point tolerance: 10% or 20%  
Low-cost 8-pin DIP/SO and 8-pin Micro SO packages  
Wide operating temperature -40°C to +85°C  
signals remain active for an additional 250ms minimum,  
allowing the power supply and system microprocessor to  
stabilize. The trip point tolerance signal, TOL, selects the trip  
level tolerance to be either 10% or 20%.  
A debounced manual reset input, PBRST, activates the reset  
outputs for a minimum period of 250ms. There is a watchdog  
timer to stop and restart a microprocessor that is “hung-up”.  
The watchdog timeouts periods are selectable: 150ms, 610ms,  
and 1200ms. If the ST input is not strobed LOW before the  
time-out period expires, a reset is generated.  
Applications  
•
•
•
•
•
Microprocessor systems  
Computers  
Controllers  
Portable instruments  
Automotive systems  
Typical Operating Circuit  
Block Diagram  
V
CC  
3.3V  
ASM1832  
V
CC  
TOL  
Tolerance Selection  
RESET  
+
µP  
ASM1832  
-
V
I/O  
CC  
ST  
Reference  
V
CC  
40KΩ  
RESET  
Push Button  
Debounce  
RESET  
TOL  
PBRST  
TD  
Reset &  
Watchdog Timer  
Voltage Sense  
Comparator  
GND  
TD  
RESET  
Watchdog  
Transition Detector  
ST  
GND  
PulseCore Semiconductor Corporation  
1715 S, Boscom Ave Suit 200,Campbell, CA 95008. Tel:408-879-9077. Fax:408-879-9018.  
www.pulsecoresemi.com  
Notice: The information in this document is subject to change without notice  
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