Datasheet > AS7C251MNTD36A-167TQC

AS7C251MNTD36A-167TQC

更新时间： 2022-12-02 00:06:51

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
22页	453K
描述
ZBT SRAM, 1MX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

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AS7C251MNTD36A-167TQC 数据手册

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AS7C251MNTD32A

AS7C251MNTD36A

Signal descriptions

Signal

CLK

I/O Properties Description

CLOCK Clock. All inputs except OE, FT, LBO, and ZZ are synchronous to this clock.

CEN

SYNC

Clock enable. When de-asserted high, the clock input signal is masked.

Address. Sampled when all chip enables are active and ADV/LD is asserted.

Data. Driven as output when the chip is enabled and OE is active.

A, A0, A1

DQ[a,b,c,d] I/O

CE0, CE1,

CE2

Synchronous chip enables. Sampled at the rising edge of CLK, when ADV/LD is asserted.

Are ignored when ADV/LD is high.

SYNC

Advance or Load. When sampled high, the internal burst address counter will increment in

the order defined by the LBO input value. (refer to table on page 2) When low, a new

address is loaded.

ADV/LD

R/W

SYNC

A high during LOAD initiates a READ operation. A low during LOAD initiates a WRITE

operation. Is ignored when ADV/LD is high.

SYNC

Byte write enables. Used to control write on individual bytes. Sampled along with WRITE

command and BURST WRITE.

BW[a,b,c,d]

ASYNC Asynchronous output enable. I/O pins are not driven when OE is inactive.

Selects Burst mode. When tied to V_DDor left floating, device follows interleaved Burst order. When

STATIC

LBO

driven Low, device follows linear Burst order. This signal is internally pulled High.

Selects Pipeline or Flow-through mode. When tied to V_DDor left floating, enables Pipeline mode.

STATIC

When driven Low, enables single register Flow-through mode. This signal is internally pulled High.

Serial data-out to the JTAG circuit. Delivers data on the negative edge of TCK. (BGA

TDO

TDI

SYNC

only)

SYNC

Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK. (BGA only)

This pin controls the Test Access Port state machine. Sampled on the rising edge of TCK.

(BGA only)

TMS

SYNC

Serial data-out to the JTAG circuit. Delivers data on the negative edge of TCK. (BGA

only)

TCK

SYNC

ASYNC Snooze. Places device in low power mode; data is retained. Connect to GND if unused.

No connects.

4/26/04, V 1.0

Alliance Semiconductor

P. 5 of 22

1 2 3 456 7 8...22

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