Datasheet > 存储 > SRAM> AS7C251MNTD32A-200TQI

AS7C251MNTD32A-200TQI

更新时间： 2024-02-16 08:22:55

品牌	Logo	应用领域
ALSC		存储内存集成电路静态存储器时钟
页数	文件大小	规格书
18页	436K
描述
2.5V 1M x 32/36 Pipelined SRAM with NTD

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技术参数
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AS7C251MNTD32A-200TQI 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	100
Reach Compliance Code：	compliant	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.38
Is Samacsys：	N	最长访问时间：	3.2 ns
其他特性：	PIPELINED ARCHITECTURE	JESD-30 代码：	R-PQFP-G100
JESD-609代码：	e3	长度：	20 mm
内存密度：	33554432 bit	内存集成电路类型：	ZBT SRAM
内存宽度：	32	功能数量：	1
端子数量：	100	字数：	1048576 words
字数代码：	1000000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	1MX32	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	RECTANGULAR
封装形式：	FLATPACK, LOW PROFILE	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	245	认证状态：	Not Qualified
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	2.625 V
最小供电电压 (Vsup)：	2.375 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	14 mm	Base Number Matches：	1

AS7C251MNTD32A-200TQI 数据手册

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AS7C251MNTD32A

AS7C251MNTD36A

Functional description

The AS7C251MNTD32A/36A family is a high performance CMOS 32 Mbit synchronous Static Random Access Memory (SRAM)

organized as 1,048,576 words × 32 or 36 bits and incorporates a LATE LATE Write.

This variation of the 32Mb+ synchronous SRAM uses the No Turnaround Delay (NTD^™) architecture, featuring an enhanced write

operation that improves bandwidth over pipelined burst devices. In a normal pipelined burst device, the write data, command, and address

are all applied to the device on the same clock edge. If a read command follows this write command, the system must wait for two 'dead'

cycles for valid data to become available. These dead cycles can significantly reduce overall bandwidth for applications requiring random

access or read-modify-write operations.

NTD^™devices use the memory bus more efficiently by introducing a write latency which matches the two-cycle pipelined or one-cycle

flow-through read latency. Write data is applied two cycles after the write command and address, allowing the read pipeline to clear. With

NTD^™, write and read operations can be used in any order without producing dead bus cycles.

Assert R/W low to perform write cycles. Byte write enable controls write access to specific bytes, or can be tied low for full 32/36 bit writes.

Write enable signals, along with the write address, are registered on a rising edge of the clock. Write data is applied to the device two clock

cycles later. Unlike some asynchronous SRAMs, output enable OE does not need to be toggled for write operations; it can be tied low for

normal operations. Outputs go to a high impedance state when the device is de-selected by any of the three chip enable inputs. In pipelined

mode, a two cycle deselect latency allows pending read or write operations to be completed.

Use the ADV (burst advance) input to perform burst read, write and deselect operations. When ADV is high, external addresses, chip select, R/W

pins are ignored, and internal address counters increment in the count sequence specified by the LBO control. Any device operations, including

burst, can be stalled using the CEN=1, the clock enable input.

The AS7C251MNTD32A/36A operates with a 2.5V ± 5% power supply for the device core (V_DD). These devices are available in a 100-pin

TQFP package.

TQFP Capacitance

Parameter

Symbol

Test conditions

V = 0V

Min

Max

Unit

Input capacitance

I/O capacitance

*Guaranteed not tested

V = V = 0V

I/O

out

TQFP thermal resistance

Description

Conditions

Symbol

Typical

Units

°C/W

1–layer

4–layer

θ_JA

Thermal resistance

(junction to ambient)¹

Test conditions follow standard test methods

and procedures for measuring thermal

impedance, per EIA/JESD51

Thermal resistance

(junction to top of case)¹

θ_JC

°C/W

1 This parameter is sampled

1/17/05, V 1.2

Alliance Semiconductor

P. 4 of 18

1 2 345 6 7...18

中文翻译

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与AS7C251MNTD32A-200TQI相关器件

型号	品牌	获取价格	描述	数据表
AS7C251MNTD32A-200TQIN	ALSC	获取价格	2.5V 1M x 32/36 Pipelined SRAM with NTD
AS7C251MNTD32A-200TQIN	ISSI	获取价格	ZBT SRAM, 1MX32, 3.2ns, CMOS, PQFP100, 14 X 20 MM, LEAD-FREE, TQFP-100
AS7C251MNTD36A-133BC	ALSC	获取价格	ZBT SRAM, 1MX36, 10ns, CMOS, PBGA165, BGA-165
AS7C251MNTD36A-133BCN	ALSC	获取价格	ZBT SRAM, 1MX36, 10ns, CMOS, PBGA165, LEAD-FREE, BGA-165
AS7C251MNTD36A-133BI	ALSC	获取价格	ZBT SRAM, 1MX36, 10ns, CMOS, PBGA165, BGA-165
AS7C251MNTD36A-133BIN	ALSC	获取价格	ZBT SRAM, 1MX36, 10ns, CMOS, PBGA165, LEAD-FREE, BGA-165
AS7C251MNTD36A-133TQC	ALSC	获取价格	2.5V 1M x 32/36 Pipelined SRAM with NTD
AS7C251MNTD36A-133TQC	ISSI	获取价格	ZBT SRAM, 1MX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C251MNTD36A-133TQCN	ALSC	获取价格	2.5V 1M x 32/36 Pipelined SRAM with NTD
AS7C251MNTD36A-133TQCN	ISSI	获取价格	ZBT SRAM, 1MX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, LEAD-FREE, TQFP-100

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