Datasheet > AS4LC1M16S0

AS4LC1M16S0

更新时间： 2022-10-11 11:58:10

品牌	Logo	应用领域
ALSC		动态存储器
页数	文件大小	规格书
29页	720K
描述
3.3V 2M × 8/1M × 16 CMOS synchronous DRAM

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数据手册

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AS4LC1M16S0 数据手册

AS4LC2M8S1

AS4LC1M16S1

DC electrical characteristics

–7

–8

–10

Parameter

Symbol

I_IL

Test conditions

0V ≤ V_IN≤ V_CC,

Pins not under test = 0V

Min Max Min Max Min Max Unit Notes

Input leakage current

–5 +5 –5 +5 –5 +5 µA

Output leakage

current

I_OL

D_OUTdisabled, 0V ≤ V_OUT≤ V_CCQ

–10 +10 –10 +10 –10 +10 µA

1,3,

Operating current

(one bank active)

t_RC≥ min, I_O= 0mA,

I_CC1

CL =3

–

140

–

100

–

100 mA

burst length = 1

4,5

Precharge standby

current (power

down mode)

I_CC2P

CKE ≤ V_IL(max), t_CK= 15 ns

CKE and CLK ≤ V_IL(max), t_CK= ∞

CS ≥ V_IH(min), CKE ≥ V_IH(min),

–

2.0

–

2.0

–

2.0 mA

I_CC2PS

I_CC2N

_CK= 15 ns; input signals changed

–

30 mA 1,2,3

Precharge standby

current (non-power-

down mode)

once during 30 ns

CLK ≤ V_IL(max), CKE ≥ V_IH(min),

_CK= ∞; input signals stable

I_CC2NS

–

mA 1,2,3

Active standby

current (power-

down mode)

I_CC3P

CKE ≤ V_IL(max), t_CK= 15 ns

CLK, CKE ≤ V_IL(max), t_CK= ∞

–

mA 1,2,3

I_CC3PS

CKE ≥ V_IH(min), CS ≥ V_IH(min),

_CK= 15 ns; input signals changed

once during 30 ns

Active standby

I_CC3N

–

35 mA 1,2,3

current (non-power-

down mode, one

bank active)

CKE ≥ V_IH(min), CLK ≥ V_IL(max),

I_CC3NS

–

10 mA 1,2,3

_CK= ∞; input signals stable

I_O= 0 mA

Page burst

All banks activated

CL =3

CL =2

140

125

–

130

115

–

120

1,2,

Operating current

(burst mode)

100

I_CC4

3,5

CL =1

–

_CCD= t_CCD(min)

1,2,

3,5

Refresh current

I_CC5

I_CC6

t_RC≥ t_RC(min)

100

80 mA

–

mA 15

Self refresh current

CKE ≤ 0.2 V

CL = CAS latency.

5/21/01; v.1.1

Alliance Semiconductor

P. 7 of 29

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