5秒后页面跳转
AS4C1M16S-6TIN PDF预览

AS4C1M16S-6TIN

更新时间: 2024-01-15 05:33:48
品牌 Logo 应用领域
ALSC 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
54页 1530K
描述
1M x 16 bit Synchronous DRAM (SDRAM)

AS4C1M16S-6TIN 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSOP2,Reach Compliance Code:compliant
ECCN代码:EAR99Factory Lead Time:8 weeks
风险等级:2.24访问模式:DUAL BANK PAGE BURST
最长访问时间:5.4 ns其他特性:AUTO/SELF REFRESH
JESD-30 代码:R-PDSO-G50长度:20.95 mm
内存密度:16777216 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:16湿度敏感等级:3
功能数量:1端口数量:1
端子数量:50字数:1048576 words
字数代码:1000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1.2 mm自我刷新:YES
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

AS4C1M16S-6TIN 数据手册

 浏览型号AS4C1M16S-6TIN的Datasheet PDF文件第1页浏览型号AS4C1M16S-6TIN的Datasheet PDF文件第3页浏览型号AS4C1M16S-6TIN的Datasheet PDF文件第4页浏览型号AS4C1M16S-6TIN的Datasheet PDF文件第5页浏览型号AS4C1M16S-6TIN的Datasheet PDF文件第6页浏览型号AS4C1M16S-6TIN的Datasheet PDF文件第7页 
AS4C1M16S-C&I  
1M x 16 bit Synchronous DRAM (SDRAM)  
Advanced (Rev. 2.0, March /2015)  
Features  
Overview  
Fast access time: 5.4/5.4ns  
Fast clock rate: 166/143 MHz  
Self refresh mode: standard  
Internal pipelined architecture  
512K word x 16-bit x 2-bank  
Programmable Mode registers  
- CAS Latency: 2, or 3  
- Burst Length: 1, 2, 4, 8, or full page  
- Burst Type: Sequential or Interleaved  
- Burst stop function  
Individual byte controlled by LDQM and UDQM  
Auto Refresh and Self Refresh  
4096 refresh cycles/64ms  
CKE power down mode  
Industrial Temperature: -40~85 C  
The 16Mb SDRAM is a high-speed CMOS  
synchronous DRAM containing 16 Mbits. It is  
internally configured as a dual 512K word x 16  
DRAM with a synchronous interface (all signals are  
registered on the positive edge of the clock signal,  
CLK). Each of the 512K x 16 bit banks is organized  
as 2048 rows by 256 columns by 16 bits. Read and  
write accesses to the SDRAM are burst oriented;  
accesses start at a selected location and continue  
for a programmed number of locations in a  
programmed sequence. Accesses begin with the  
registration of a BankActivate command which is  
then followed by a Read or Write command.  
The SDRAM provides for programmable Read  
or Write burst lengths of 1, 2, 4, 8, or full page, with  
a burst termination option. An auto precharge  
function may be enabled to provide a self-timed row  
precharge that is initiated at the end of the burst  
sequence. The refresh functions, either Auto or Self  
Refresh are easy to use. By having a programmable  
mode register, the system can choose the most  
suitable modes to maximize its performance. These  
devices are well suited for applications requiring  
high memory bandwidth and particularly well suited  
to high performance PC applications  
°
JEDEC standard +3.3V 0.3V power supply  
Operating temperature range  
- Commercial (0 ~ 70°C)  
- Industrial (-40 ~ 85°C)  
Interface: LVTTL  
50-pin 400 mil plastic TSOP II package  
-Pb and Halogen Free  
Table 1. Key Specifications  
AS4C1M16S-C&I  
-6/7  
tCK3  
tAC3  
tRAS  
tRC  
Clock Cycle time(min.)  
Access time from CLK (max.)  
Row Active time(min.)  
Row Cycle time(min.)  
6/7  
ns  
5.4/5.4 ns  
42/42 ns  
60/63 ns  
Table 2.Ordering Information  
Part Number  
Frequency Package  
Temperature Temp Range  
AS4C1M16S-7TCN  
AS4C1M16S-6TIN  
143MHz  
166MHz  
50-Pin TSOPII Commercial  
50-Pin TSOPII Industrial  
0~70  
-40~85  
T: indicates TSOP II package  
C: Commercial  
I: Industrial  
N: indicates Pb and Halogen Free  
Confidential  
1
Rev. 2.0  
March /2015  

与AS4C1M16S-6TIN相关器件

型号 品牌 描述 获取价格 数据表
AS4C1M16S-7TCN ALSC 1M x 16 bit Synchronous DRAM (SDRAM)

获取价格

AS4C1M16S-CI ALSC Programmable Mode registers

获取价格

AS4C256K16E0 ALSC 5V 256Kx16 CMOS DRAM (EDO)

获取价格

AS4C256K16E0-30 ALSC 5V 256Kx16 CMOS DRAM (EDO)

获取价格

AS4C256K16E0-30JC ALSC 5V 256Kx16 CMOS DRAM (EDO)

获取价格

AS4C256K16E0-35 ALSC 5V 256Kx16 CMOS DRAM (EDO)

获取价格