APU0071
PIN DESCRIPTION
Input /
Output
PIN
Name
Description
For logical circuit (+3v,+5v)
0V (GND)
Bias voltage level for LCD driving
Interface
VDD
Power supply & LCD
Bias pin
Power
Supply
P
VSS (GND)
V2,V3,V5
S1 ~ S80
C1 ~ C16
Output Segment output
Output Common output
Segment signal output for LCD driving
Common signal output for LCD driving
When using external clock, used as clock input pin.
When using internal oscillator, connect to VDD or VSS.
When EXT_INT = “High”, external clock is used.
LCD
LCD
External
clock
EXTCLK
EXT_INT
Input External clock Input
External / Internal
Input
MPU
oscillator clock select When “Low”, instruction oscillator is used.
Used as register selection input.
RS
Input Register select
When RS = “High”, data register is selected.
When RS = “Low”, instruction register is selected.
Used as read / write selection input.
R_NW
E
Input Read / Write
When RW = “High”, read operation.
When RW = “Low”, write operation.
Input Read / Write enable Used as read / write enable signal.
When 8-bit bus mode, used as low order bi-directional
DB0 ~ DB3
data bus.
MPU
During 4-bit bus mode open these pins.
When 8-bit bus mode, used as high order bi-directional
data bus. In case of 4-bit bus mode, used as both high
and low order.
DB7 is used for Busy Flag output during read
instruction operation.
If it is necessary to initialize the system by hardware,
force “Low”, level signal to this terminal about 1.2 ms.
Internal oscillator test pin. Open this pin.
Internal test pin. Open this pin.
Input /
Output
Data Bus 0 ~ 7
DB4 ~ DB7
EXT_RST
Input Reset
OSC_TS
POR_TS
M_TS
Output Test Pin
Output Test Pin
Output Test Pin
Internal test pin. Open this pin.
CLK1_TS Output Test Pin
Internal test pin. Open this pin.
Copyright ANPEC Electronics Corp.
Rev. A.07 - FEB., 2002
5
www.anpec.com.tw