Datasheet > AN983B

AN983B

更新时间： 2022-11-29 07:39:05

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其他 - ETC		控制器 PC 局域网以太网
页数	文件大小	规格书
91页	2151K
描述
PCI/miniPCI-to-Ethernet LAN Controller

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AN983B 数据手册

AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY

6). Keep the distance between the Tx and Rx differential pairs large, even separate ground

planes underneath Tx and Rx signal pairs.

7). Away from clock and power trace.

8). If possible, with GND plane around.

9). If Tx rout trace must cross, you can swap the trace between chip and transformer, and

transformer to RJ45, too.

10).The high frequency signal trace width 10~12mil.

11).PCI clk signal trace length must equal 2.5inch and other PCI bus signal trace length should

less then 1.5 inch

ꢀ Digital signal should away from analog signal and power trace. If can’t

be avoided, better be cross over by 90 degree with analog/Vcc routing at

other plane.

ꢀ Vcc trace should short and prefer route in the format of the plane a

special for GND.

ꢀ Connect Pin 8 and pin 14 together first then use signal via to Gnd.

Bad

Good

12.3 VCC AND GND

ꢀ Vcc power:

1). Avoid unnecessary Vcc trace to IC’s and devices keep these trace as short and wide.

2). Power trace width > 40 mils (if power trace route to the other side .It must use several via

to connect each other).

3). Power source use bulk capacitors (22~47uf) to reduce noise.

Rev. 1.8

ADMtek Inc.

www.admtek.com.tw

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