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AN77L00/AN77L00M PDF预览

AN77L00/AN77L00M

更新时间: 2022-01-23 19:02:00
品牌 Logo 应用领域
松下 - PANASONIC 稳压器
页数 文件大小 规格书
8页 83K
描述
Series 3-Pin Low Power Loss Voltage Regulator

AN77L00/AN77L00M 数据手册

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Voltage Regulators  
AN77L00/AN77L00M Series  
Electrical Characteristics (Ta=25˚C)  
AN77L07/M (7V, 100mA Type)  
Parameter  
Output voltage  
Symbol  
Condition  
min  
typ  
7.0  
max  
7.28  
70  
Unit  
VO  
REGIN  
REGL  
Ibias  
Tj=25˚C  
6.72  
V
Input stability  
VI=7.78 to 17.78V, Tj=25˚C  
IO= 0 to 100mA, Tj=25˚C  
IO= 0mA, Tj=25˚C  
5
11  
mV  
mV  
mA  
mA  
mA  
dB  
Load stability  
70  
Bias current under no load  
Bias current fluctuation under load  
Bias current before regulation start  
Ripple rejection ratio  
1.1  
3
1.6  
5
Ibias  
IO= 0 to 100mA, Tj=25˚C  
VI= 6.3V, IO= 0mA, Tj=25˚C  
VI=7.78 to 9.78V, f=120Hz  
VI= 6.3V, IO= 50mA, Tj=25˚C  
VI= 6.3V, IO=100mA, Tj=25˚C  
f=10Hz to 100kHz  
Irush  
1.5  
65  
5
RR  
55  
Min. input/output voltage difference (1)  
Min. input/output voltage difference (2)  
Output noise voltage  
VDIF (min)1  
VDIF (min) 2  
Vno  
0.12  
0.26  
120  
0.46  
0.25  
0.48  
V
V
µV  
Output voltage temperature coefficient  
VO/Ta  
Tj= –30 to+125˚C  
mV/˚C  
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at  
joints of the chip may be ignored.  
Note 2) VI= 8V, IO=50mA, CO=10µF unless otherwise specified.  
AN77L08/M (8V, 100mA Type)  
Parameter  
Output voltage  
Symbol  
VO  
Condition  
min  
typ  
max  
8.32  
80  
Unit  
Tj=25˚C  
7.68  
8
5
V
Input stability  
REGIN  
REGL  
Ibias  
VI= 8.82 to 18.82V, Tj=25˚C  
IO= 0 to 100mA, Tj=25˚C  
IO= 0mA, Tj=25˚C  
mV  
mV  
mA  
mA  
mA  
dB  
Load stability  
12  
1.1  
80  
Bias current under no load  
Bias current fluctuation under load  
Bias current before regulation start  
Ripple rejection ratio  
1.6  
5
Ibias  
IO= 0 to 100mA, Tj=25˚C  
VI=7.2V, IO= 0mA, Tj=25˚C  
VI= 8.82 to 10.82V, f=120Hz  
VI=7.2V, IO=50mA, Tj= 25˚C  
VI=7.2V, IO=100mA, Tj= 25˚C  
f=10Hz to 100kHz  
3
Irush  
1.5  
5
RR  
53  
63  
Min. input/output voltage difference (1)  
Min. input/output voltage difference (2)  
Output noise voltage  
VDIF (min)1  
VDIF (min) 2  
Vno  
0.12  
0.27  
135  
0.53  
0.25  
0.51  
V
V
µV  
Output voltage temperature coefficient  
VO/Ta  
Tj= –30 to +125˚C  
mV/˚C  
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at  
joints of the chip may be ignored.  
Note 2) VI=9V, IO=50mA, CO=10µF unless otherwise specified.  
AN77L09/M (9V, 100mA Type)  
Parameter  
Output voltage  
Symbol  
VO  
Condition  
min  
typ  
max  
9.36  
90  
Unit  
Tj=25˚C  
8.64  
9
6
V
Input stability  
REGIN  
REGL  
Ibias  
VI=9.86 to 19.86V, Tj=25˚C  
IO= 0 to 100mA, Tj=25˚C  
IO= 0mA, Tj=25˚C  
mV  
mV  
mA  
mA  
mA  
dB  
Load stability  
13  
1.2  
3
90  
Bias current under no load  
Bias current fluctuation under load  
Bias current before regulation start  
Ripple rejection ratio  
1.7  
5
Ibias  
IO= 0 to 100mA, Tj=25˚C  
VI=8.1V, IO= 0mA, Tj=25˚C  
VI=9.86 to 11.86V, f=120Hz  
VI=8.1V, IO= 50mA, Tj=25˚C  
VI=8.1V, IO=100mA, Tj=25˚C  
f=10Hz to 100kHz  
Irush  
1.5  
62  
5
RR  
52  
Min. input/output voltage difference (1)  
Min. input/output voltage difference (2)  
Output noise voltage  
VDIF (min) 1  
VDIF (min) 2  
Vno  
0.13  
0.28  
150  
0.6  
0.25  
0.53  
V
V
µV  
Output voltage temperature coefficient  
VO/Ta  
Tj=–30 to+125˚C  
mV/˚C  
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at  
joints of the chip may be ignored.  
Note 2) VI=10V, IO=50mA, CO=10µF unless otherwise specified.  
5

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