Datasheet > AN221D04-EVAL

AN221D04-EVAL

更新时间： 2022-12-18 08:24:29

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描述
Dynamically Reconfigurable FPAA With Enhanced I/O

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AN221D04-EVAL 数据手册

AN221E04 Datasheet – Dynamically Reconfigurable FPAA With Enhanced I/O

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

Parameter

DC Power Supplies

Symbol

AVDD(2)

BVDD

Min

Typ

Max

Unit

Comment

AVSS, BVSS, DVSS and SVSS all

-0.5

5.5 V

held to 0.0 V ^a

DVDD

Ideally all supplies should be at the

same voltage

xVDD to xVDD Offset

-0.5

0.5

Still air, No heatsink, 4 layer board,

44 pins. θja = 55°C/W

Pmax 25°C

Pmax 85°C

Vinmax

Top

1.8

0.73

Package Power Dissipation

Analog and Digital Input Voltage

Ambient Operating Temperature

Storage Temperature

Vss-0.5

-40

Vdd+0.5

°C

Tstg

-65

150

Absolute Maximum DC Power Supply Rating - The failure mode is non-catastrophic for Vdd of up to 7 volts, but will cause reduced

operating life time. The additional stress caused by higher local electric fields within the CMOS circuitry may induce metal migration,

oxide leakage and other time/quality related issues.

Recommended Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

Comment

AVDD(2)

DC Power Supplies

AVSS, BVSS, DVSS and SVSS all

held to 0 V

BVDD

4.75

5.00

5.25

DVDD

Analog Input Voltage.

Vina

VMR-1.9

VMR+1.9

VMR is 2.0 volts above AVSS

Digital Input Voltage

Junction Temp

Vind

DVDD

125

Assume a package θja = 55°C/W ^b

-40

°C

In order to calculate the junction temperature you must first empirically determine the current draw (total Idd) for the design. Once the

current consumption established then the following formula can be used; Tj = Ta + Idd x Vdd x 55 °C/W, where Ta is the ambient

temperature. The worst case θja of 55 °C/W assumes no air flow and no additional heatsink of any type.

General Digital I/O Characteristics (Vdd = 5v +/- 10%, -40 to 85 deg.C)

Parameter

Symbol

Min

Typ

Max

Unit

Comment

Input Voltage Low

Input Voltage High

Output Voltage Low

Output Voltage High

Input Leakage Current

Vih

% of DVDD

Vil

100

% of DVDD

Vol

% of DVDD

Voh

Iil

100

±1.0

% of DVDD

µA

All pins except DCLK

DCLK if a crystal is connected and

the on-chip oscillator is used

The maximum load for a digital

output is 10 pF // 10 Kohm

The maximum load for a digital

output is 10 pF // 10 Kohm

For MODE = 1, Max DCLK is

16 MHz

Iil

±12.0

µA

Max. Capacitive Load

Min. Resistive Load

DCLK Frequency

ACLK Frequency

Clock Duty Cycle

Cmax

Rmin

Fmax

Kohm

MHz

Divide down to <8 MHz prior to use

as a CAB clock

Fmax

MHz

All clocks

DS030100-U006a

- 4 -

1 2 345 6 7...21

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