AN53
APPLICATION NOTE
Two MOSFETs in parallel.
+5V
If output current is high, We recommend two MOSFETs
used in parallel instead of one single MOSFET. The follow-
ing significant advantages are realized using two MOSFETs
in parallel:
D1
VCCQP
HIDRV
Q1
CP
L2 RS
• Significant reduction of Power dissipation.
Example: RC5051 with Maximum output current of 14A
at 2.8V with one MOSFET on the high side:
VO
PWM/PFM
Control
COUT
LODRV
GNDP
PMOSFET = (I2 RDS,ON)(Duty Cycle) =
(14A)2 (0.050W)(2.8V / 5V) = 5.5W
Q2
D2
With two MOSFETs in parallel:
65-5051-06
Figure 4. Charge Pump Configuration
P
= (I 2
R
)(Duty Cycle) =
MOSFET
DS,ON
(14A/2)2 (0.037W) (2.8V / 5V) = 1.0W/FET
• Method 2. 12V Gate Bias.
Figure 5 illustrates how a 12V source can be used to bias the
VCCQP. A 47W resistor is used to limit the transient current
into the VCCQP pin and a 1mF capacitor filter is used to filter
the VCCQP supply. This method provides a higher gate bias
*Note: R
DS,ON
increases with temperature. Assume R =
DS,ON
25mW at 25°C. RDS, ON can easily increase to 50mW at high tempera-
ture when using a single MOSFET. When using two MOSFETs in par-
allel, the temperature effects should not cause the RDS, ON to rise as
much.
voltage (V ) to the MOSFET than the charge-pump method
GS
• Smaller heat sink required.
does, and therefore reduces the RDS, ON of the MOSFET and
With power dissipation down to around one watt,
considerably less heat sink is required.
thus reduces the power loss due to the MOSFET. Figure 6
shows how RDS, ON reduces dramatically with V increases.
GS
A 6.2V Zener diode (D1) is placed from VCCQP to 5V to
clamp the voltage at VCCQP to a maximum of 12V and
ensure that the absolute maximum voltage of the IC will not
be exceeded.
• Reliability.
With thermal management under control, this DC-DC
converter is able to deliver load currents up to 14.5A with
no performance or reliability concerns.
+5V
• MOSFET Gate Bias.
+12V
47½
As already discussed, the low-side MOSFET on the
RC5051 needs only 5V for its gate drive supply. The high-
side MOSFET can be biased by one of two methods:
Charge Pump or 12V Gate Bias.
D1
VCCQP
Q1
HIDRV
1µF
• Method 1. Charge pump (or Bootstrap) method.
Figure 4 displays the use of a charge pump to provide gate
bias to the high-side MOSFET with the RC5051.
Capacitor CP is the charge pump deployed to boost the
voltage of the RC5051 output driver. When the MOSFET
switches off, the source of the MOSFET is at
L2 RS
VO
PWM/PFM
Control
COUT
LODRV
Q2
D2
GNDP
approximately 0V. VCCQP is charged through the
Schottky diode D1 to approximately 4.5V. Thus, the
capacitor CP is charged to approximately 4.5V. When the
MOSFET turns on, the source of the MOSFET voltage is
equal to 5V. The capacitor voltage follows, and hence
provides a voltage at VCCQP equal to approximately 10V.
The Schottky diode D1 is required to provide the charge
path when the MOSFET is off, and reverses bias when the
VCCQP goes to 10V. The charge pump capacitor, CP,
needs to be a high Q, high frequency capacitor. A 1mF
ceramic capacitor is recommended here.
65-5051-07
Figure 5. 12V Gate Bias Configuration
IRL2203NS
NDP6030L
FDP7030L
NDB603AL
Figure 6. R
vs. V for Selected MOSFETs
GS
DS,ON
8
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