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AMIS30622C6228RG PDF预览

AMIS30622C6228RG

更新时间: 2024-01-28 05:42:49
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器运动控制电子器件信号电路电动机控制电机
页数 文件大小 规格书
42页 491K
描述
I²C Micro-Stepping Motor Driver

AMIS30622C6228RG 技术参数

是否无铅: 不含铅生命周期:Lifetime Buy
零件包装代码:QFN包装说明:HVQCCN, LCC32,.27SQ,25
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.28Is Samacsys:N
模拟集成电路 - 其他类型:STEPPER MOTOR CONTROLLERJESD-30 代码:S-XQCC-N32
JESD-609代码:e3长度:7 mm
湿度敏感等级:3功能数量:1
端子数量:32最高工作温度:125 °C
最低工作温度:-40 °C最大输出电流:0.8 A
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.27SQ,25封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5,6.5/29 V认证状态:Not Qualified
座面最大高度:0.9 mm子类别:Motion Control Electronics
最大供电电压 (Vsup):29 V最小供电电压 (Vsup):6.5 V
标称供电电压 (Vsup):8 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

AMIS30622C6228RG 数据手册

 浏览型号AMIS30622C6228RG的Datasheet PDF文件第33页浏览型号AMIS30622C6228RG的Datasheet PDF文件第34页浏览型号AMIS30622C6228RG的Datasheet PDF文件第35页浏览型号AMIS30622C6228RG的Datasheet PDF文件第37页浏览型号AMIS30622C6228RG的Datasheet PDF文件第38页浏览型号AMIS30622C6228RG的Datasheet PDF文件第39页 
AMIS-30622  
GetFullStatus2  
This command is provided to the circuit by the Master to get the actual position of the Stepper-motor. The  
position is provided by the circuit in 16-bit format, with the 3 LSBs at ‘0’ when in half stepping mode (StepMode  
= “00”). Furthermore programmed target position and secure position are also provided.  
Notations:  
actual position of the stepper motor <ActPos [15:0]>  
target position of the stepper motor <TagPos [15:0]>  
secure position of the stepper motor <SecPos [10:0])>  
GetFullStatus2command  
Structure  
Byte  
Content  
bit 7  
1
bit 6  
1
bit 5  
OTP3  
1
bit 4  
OTP2  
1
bit 3  
OTP1  
1
bit 2  
OTP0  
1
bit 1  
HW  
0
bit 0  
0
0
1
Slave Address  
GetFullStatus2  
1
1
0
GetFullStatus2command (Response)  
Structure  
Byte  
Content  
bit 7  
1
bit 6  
1
bit 5  
OTP3  
1
bit 4  
OTP2  
1
bit 3  
OTP1  
OTP3  
bit 2  
OTP0  
OTP2  
bit 1  
HW  
bit 0  
1
0
1
2
3
4
5
6
7
8
Slave Address  
Address  
1
1
OTP1  
OTP0  
Actual Position 1  
Actual Position 2  
Target Position 1  
Target Position 2  
Secure Position  
Secure Position  
ActPos[15:8]  
ActPos[7:0]  
TagPos[15:0]  
TagPos[7:0]  
SecPos[7:0]  
1
1
1
1
1
1
1
1
1
1
SecPos[10:8]  
1
1
1
N/A  
GetOTPParam  
This command is provided to the circuit by to read the content of an OTP Memory. For more information refer to  
see § 9.2.2.13 OTP Memory Structure  
.
GetOTPParam command  
Structure  
Byte  
Content  
bit 7  
1
bit 6  
1
bit 5  
OTP3  
0
bit 4  
OTP2  
0
bit 3  
OTP1  
0
bit 2  
OTP0  
0
bit 1  
HW  
1
bit 0  
0
0
1
Slave Address  
GetOTPParam  
1
0
0
GetOTPParamcommand (Response)  
Structure  
Byte  
Content  
bit 7  
1
bit 6  
1
bit 5  
OTP3  
bit 4  
OTP2  
bit 3  
OTP1  
bit 2  
OTP0  
bit 1  
HW  
bit 0  
1
0
1
2
3
4
5
6
7
Slave Address  
OTP byte 0  
OTP byte 1  
OTP byte 2  
OTP byte 3  
OTP byte 4  
OTP byte 5  
OTP byte 6  
OTP byte 7  
OTP@0x00  
OTP@0x01  
OTP@0x02  
OTP@0x03  
OTP@0x04  
OTP@0x05  
OTP@0x06  
OTP@0x07  
Rev. 3 | Page 36 of 42 | www.onsemi.com  

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