Datasheet > AM79C965A

AM79C965A

更新时间： 2024-01-22 19:58:42

品牌	Logo	应用领域
超微 - AMD		个人通信控制器 PC PCN 以太网
页数	文件大小	规格书
228页	1661K
描述
PCnet?-32 Single-Chip 32-Bit Ethernet Controller

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AM79C965A 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	QFP, QFP160,1.2SQ
针数：	16	Reach Compliance Code：	compliant
HTS代码：	8542.31.00.01	地址总线宽度：	30
边界扫描：	YES	总线兼容性：	VL; 80486
最大时钟频率：	33 MHz	数据编码/解码方法：	NRZ; BIPH-LEVEL(MANCHESTER)
外部数据总线宽度：	32	JESD-30 代码：	S-PQFP-G16
JESD-609代码：	e0	长度：	28 mm
低功率模式：	YES	湿度敏感等级：	3
DMA 通道数量：	1	I/O 线路数量：
串行 I/O 数：	3	端子数量：	16
片上数据RAM宽度：		最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	QFP160,1.2SQ
封装形状：	SQUARE	封装形式：	FLATPACK
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	RAM（字数）：	0
座面最大高度：	3.47 mm	子类别：	Serial IO/Communication Controllers
最大压摆率：	100 mA	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	TIN LEAD
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	28 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：	1

AM79C965A 数据手册

Am79C965A

PCnet™-32 Single-Chip 32-Bit Ethernet Controller

DISTINCTIVE CHARACTERISTICS

ꢀ Single-chip Ethernet controller for 486 and

Video Electronics Standards Association

(VESA) local buses

ꢀ Individual 136-byte transmit and 128-byte

receive FIFOs provide frame buffering for

increased system latency tolerance and

support the following features:

ꢀ Supports ISO 8802-3 (IEEE/ANSI 802.3) and

Ethernet standards

—Automatic retransmission with no FIFO reload

—Automatic receive stripping and transmit

padding (individually programmable)

ꢀ Direct interface to the 486 local bus or VESA

VL-Bus

—Automatic runt packet rejection

ꢀ Enhanced burst mode with support for Am486™

burst read/write operations

—Automatic deletion of received collision frames

ꢀ Software-compatible with AMD’s Am7990

LANCE, Am79C90 C-LANCE, Am79C960

PCnet-ISA, Am79C961 PCnet-ISA+, Am79C961A

PCnet-ISA II, Am79C970A PCnet-PCI II, and

Am79C900 ILACC™ register and descriptor

architecture

ꢀ JTAG Boundary Scan (IEEE 1149.1) test access

port interface for board-level production test

ꢀ Provides integrated attachment unit interface

(AUI) and 10BASE-T transceiver with automatic

port selection

ꢀ Automatic twisted-pair receive polarity

detection and automatic correction of the

receive polarity

ꢀ Compatible with Am2100/Am1500T and Novell

NE2100/NE1500 driver software

ꢀ High-performance Bus Master architecture with

integrated DMA buffer management unit for low

CPU and bus utilization

ꢀ Optional byte padding to long-word boundary

on receive

ꢀ Dynamic transmit FCS generation

ꢀ Built-in byte-swap logic supports both big and

programmable on a frame-by-frame basis

little endian byte alignment

ꢀ Internal/external loopback capabilities

ꢀ Microwire EEPROM interface supports

ꢀ Supports the following types of network

jumperless design

interfaces:

ꢀ Single +5 V power supply operation

—AUI to external 10BASE-2, 10BASE-5,

10BASE-T or 10BASE-F MAU

ꢀ Low-power, CMOS design with sleep modes

allows reduced power consumption for critical

battery-powered applications and Green PCs

—Internal 10BASE-T transceiver with Smart

Squelch to twisted-pair medium

ꢀ Look-Ahead Packet Processing (LAPP) allows

protocol analysis to begin before end of receive

frame

ꢀ Supports LANCE/C-LANCE/PCnet-ISA general

purpose serial interface (GPSI)

ꢀ Integrated Manchester encoder/decoder

ꢀ 160-pin PQFP package

GENERAL DESCRIPTION

The PCnet-32 single-chip 32-bit Ethernet controller is a

highly integrated Ethernet system solution designed to

address high-performance system application require-

ments. It is a flexible bus-mastering device that can be

used in any networking application, including network-

ready PCs, printers, fax modems, and bridge/router

designs. The bus-master architecture provides high

data throughput in the system and low CPU and bus

utilization. The PCnet-32 controller is fabricated with

AMD’s advanced low-power CMOS process to provide

low operating and standby current for power-sensitive

applications.

Publication# 18219 Rev: D Amendment/0

Issue Date: August 2000

12 3 4 5 6 7...228

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AM79C970A?	ETC	Am79C970A? 2.52MB (PDF) PCnet PCI II Single-Chip Full-Duplex Ethernet Controller for PCI L	获取价格
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