Datasheet > AM49DL32XBG

AM49DL32XBG

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
超微 - AMD		闪存
页数	文件大小	规格书
64页	1054K
描述
32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit)

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中文翻译

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数据手册

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AM49DL32XBG 数据手册

P R E L I M I N A R Y

PIN DESCRIPTION

LOGIC SYMBOL

A20–A0

= 21 Address Inputs (Common)

A-1

= 2 Address Inputs (Flash)

= 16 Data Inputs/Outputs (Common)

= Chip Enable (Flash)

A20–A0

DQ15–DQ0

CE#f

A-1

CE1#s

CE2s

= Chip Enable 1 (pSRAM)

= Chip Enable 2 (pSRAM)

= Output Enable (Common)

= Write Enable (Common)

= Ready/Busy Output

16 or 8

CE#f

DQ15–DQ0

OE#

CE1#s

CE2s

WE#

RY/BY#

UB#s

OE#

= Upper Byte Control (pSRAM)

= Lower Byte Control (pSRAM)

WE#

LB#s

WP#/ACC

RESET#

UB#s

CIOf

= I/O Configuration (Flash)

CIOf = V_IH= Word mode (x16),

CIOf = V_IL= Byte mode (x8)

LB#s

RESET#

= Hardware Reset Pin, Active Low

CIOf

WP#/ACC

= Hardware Write Protect/

Acceleration Pin (Flash)

V_CC

= Flash 3.0 volt-only single power sup-

ply (see Product Selector Guide for

speed options and voltage supply

tolerances)

V_CC

V_SS

= pSRAM Power Supply

= Device Ground (Common)

= Pin Not Connected Internally

Am49DL32xBG

July 19, 2002

1...6 7 8910 11 12...64

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AM49DL32XBGT70IS	SPANSION	获取价格	Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bi
AM49DL32XBGT70IT	SPANSION	获取价格	Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bi
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AM49DL6408H	SPANSION	获取价格	64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mb
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