Datasheet > AM45DL32X8G

AM45DL32X8G

更新时间： 2022-01-18 23:27:00

品牌	Logo	应用领域
其他 - ETC		闪存静态存储器
页数	文件大小	规格书
64页	1122K
描述
Am45DL32x8G - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM

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AM45DL32X8G 数据手册

P R E L I M I N A R Y

FLASH ERASE AND PROGRAMMING PERFORMANCE

Parameter

Typ (Note 1) Max (Note 2)

Unit

sec

µs

Comments

Sector Erase Time

0.4

Excludes 00h programming

prior to erasure (Note 4)

Chip Erase Time

Byte Program Time

Accelerated Byte/Word Program Time

Word Program Time

150

120

210

µs

Excludes system level

overhead (Note 5)

µs

Byte Mode

Word Mode

Chip Program Time

(Note 3)

sec

Notes:

1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V_CC, 1,000,000 cycles. Additionally,

programming typicals assume checkerboard pattern.

2. Under worst case conditions of 90°C, V_CC= 2.7 V, 1,000,000 cycles.

3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes

program faster than the maximum program times listed.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Tables

16 and 18 for further information on command definitions.

6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.

LATCHUP CHARACTERISTICS

Description

Min

Max

Input voltage with respect to V_SSon all pins except I/O pins

(including A9, OE#, and RESET#)

–1.0 V

12.5 V

Input voltage with respect to V_SSon all I/O pins

V_CCCurrent

–1.0 V

V_CC+ 1.0 V

+100 mA

–100 mA

Note: Includes all pins except V_CC. Test conditions: V_CC= 3.0 V, one pin at a time.

PACKAGE PIN CAPACITANCE

Parameter

Symbol

Parameter Description

Input Capacitance

Test Setup

V_IN= 0

Typ

Max

Unit

C_IN

C_OUT

C_IN2

Output Capacitance

V_OUT= 0

V_IN= 0

Control Pin Capacitance

WP#/ACC Pin Capacitance

C_IN3

V_IN= 0

Notes:

1. Sampled, not 100% tested.

2. Test conditions T_A= 25°C, f = 1.0 MHz.

FLASH DATA RETENTION

Parameter Description

Test Conditions

150°C

Min

Unit

Years

Minimum Pattern Data Retention Time

125°C

Am45DL32x8G

August 28, 2002

1...58 59 606162 63 64

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