AM3715, AM3703
www.ti.com
SPRS616F–JUNE 2010–REVISED AUGUST 2011
AM3715, AM3703
Sitara ARM Microprocessors
Check for Samples: AM3715, AM3703
1 AM3715, AM3703 Sitara ARM Microprocessors
1.1 Features
123456
Pseudo-SRAM
• AM3715/03 Sitara ARM Microprocessors:
– Compatible with OMAP™ 3 Architecture
–
–
Flexible Asynchronous Protocol
Control for Interface to Custom Logic
(FPGA, CPLD, ASICs, etc.)
Nonmultiplexed Address/Data Mode
(Limited 2K-Byte Address Space)
– Sitara™ ARM® Microprocessor (MPU)
Subsystem
•
Up to 1-GHz Sitara™ ARM® Cortex™-A8
Core
– 1.8-V I/O and 3.0-V (MMC1 only),
0.9-V to 1.2-V Adaptive Processor Core
Voltage
Also supports 300, 600, and 800-MHz
operation
•
NEON™ SIMD Coprocessor
0.9-V to 1.1-V Adaptive Core Logic Voltage
Note: These are default Operating
Performance Point (OPP) voltages and could
be optimized to lower values using
SmartReflex AVS.
– POWERVR SGX™ Graphics Accelerator
(AM3715 only)
•
•
Tile Based Architecture Delivering up to
20 MPoly/sec
Universal Scalable Shader Engine:
Multi-threaded Engine Incorporating Pixel
and Vertex Shader Functionality
– Commercial, Industrial, and Extended
Temperature Grades
– Serial Communication
•
•
•
Industry Standard API Support:
OpenGLES 1.1 and 2.0, OpenVG1.0
Fine Grained Task Switching, Load
Balancing, and Power Management
Programmable High Quality Image
Anti-Aliasing
•
5 Multichannel Buffered Serial Ports
(McBSPs)
–
–
–
512 Byte Transmit/Receive Buffer
(McBSP1/3/4/5)
5K-Byte Transmit/Receive Buffer
(McBSP2)
SIDETONE Core Support (McBSP2 and
3 Only) For Filter, Gain, and Mix
Operations
Direct Interface to I2S and PCM Device
and T Buses
– External Memory Interfaces:
•
SDRAM Controller (SDRC)
–
16, 32-bit Memory Controller With
1G-Byte Total Address Space
–
–
–
–
Interfaces to Low-Power SDRAM
SDRAM Memory Scheduler (SMS) and
Rotation Engine
128 Channel Transmit/Receive Mode
•
•
•
Four Master/Slave Multichannel Serial
Port Interface (McSPI) Ports
High-Speed/Full-Speed/Low-Speed USB
OTG Subsystem (12-/8-Pin ULPI Interface)
High-Speed/Full-Speed/Low-Speed
Multiport USB Host Subsystem
12-/8-Pin ULPI Interface or 6-/4-/3-Pin
Serial Interface
One HDQ/1-Wire Interface
Four UARTs (One with Infrared Data
Association [IrDA] and Consumer Infrared
•
General Purpose Memory Controller
(GPMC)
–
16-bit Wide Multiplexed Address/Data
Bus
–
Up to 8 Chip Select Pins With
128M-Byte Address Space per Chip
Select Pin
–
–
Glueless Interface to NOR Flash,
NAND Flash (With ECC Hamming
Code Calculation), SRAM and
•
•
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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POWERVR SGX is a trademark of Imagination Technologies Ltd.
OMAP, Sitara are trademarks of Texas Instruments.
Cortex, NEON are trademarks of ARM Limited.
ARM is a registered trademark of ARM Ltd.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2011, Texas Instruments Incorporated