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AM29DL164DB120WCIN PDF预览

AM29DL164DB120WCIN

更新时间: 2024-02-26 23:50:58
品牌 Logo 应用领域
其他 - ETC 闪存内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
52页 936K
描述
x8/x16 Flash EEPROM

AM29DL164DB120WCIN 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:TFBGA,
针数:48Reach Compliance Code:compliant
ECCN代码:3A001.A.2.CHTS代码:8542.32.00.51
风险等级:5.84最长访问时间:120 ns
其他特性:20 YEAR DATA RETENTION备用内存宽度:8
启动块:BOTTOM数据保留时间-最小值:20
JESD-30 代码:R-PBGA-B48JESD-609代码:e1
长度:9 mm内存密度:16777216 bit
内存集成电路类型:FLASH内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:48字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260编程电压:3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40类型:NOR TYPE
宽度:8 mm

AM29DL164DB120WCIN 数据手册

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GENERAL DESCRIPTION  
The Am29DL162D/163D/164D devices consists of 16  
megabit, 3.0 volt-only flash memory devices, organized  
as 1,048,576 words of 16 bits each or 2,097,152 bytes  
of 8 bits each. Word mode data appears on  
DQ0–DQ15; byte mode data appears on DQ0–DQ7.  
The device is designed to be programmed in-system  
with the standard 3.0 volt VCC supply, and can also be  
programmed in standard EPROM programmers.  
other flash sector, or may permanently lock their own  
code there.  
DMS (Data Management Software) allows systems  
to easily take advantage of the advanced architecture  
of the simultaneous read/write product line by allowing  
removal of EEPROM devices. DMS will also allow the  
system software to be simplified, as it will perform all  
functions necessary to modify data in file structures,  
as opposed to single-byte modifications. To write or  
update a particular piece of data (a phone number or  
configuration data, for example), the user only needs  
to state which piece of data is to be updated, and  
where the updated data is located in the system. This  
is an advantage compared to systems where  
user-written software must keep track of the old data  
location, status, logical to physical translation of the  
data onto the Flash memory device (or memory de-  
vices), and more. Using DMS, user-written software  
does not need to interface with the Flash memory di-  
rectly. Instead, the user's software accesses the Flash  
memory by calling one of only six functions. AMD pro-  
vides this software to simplify system design and  
software integration efforts.  
The device is available with an access time of 70, 90,  
or 120 ns. The devices are offered in 48-pin TSOP and  
48-ball FBGA packages. Standard control pins—chip  
enable (CE#), write enable (WE#), and output enable  
(OE#)—control normal read and write operations, and  
avoid bus contention issues.  
The device requires only a single 3.0 volt power sup-  
ply for both read and write functions. Internally  
generated and regulated voltages are provided for the  
program and erase operations.  
Simultaneous Read/Write Operations with  
Zero Latency  
The Simultaneous Read/Write architecture provides  
simultaneous operation by dividing the memory  
space into two banks. The device can improve overall  
system performance by allowing a host system to pro-  
gram or erase in one bank, then immediately and  
simultaneously read from the other bank, with zero la-  
tency. This releases the system from waiting for the  
completion of program or erase operations.  
The device offers complete compatibility with the  
JEDEC single-power-supply Flash command set  
standard. Commands are written to the command  
register using standard microprocessor write timings.  
Reading data out of the device is similar to reading  
from other Flash or EPROM devices.  
The host system can detect whether a program or  
erase operation is complete by using the device sta-  
tus bits: RY/BY# pin, DQ7 (Data# Polling) and  
DQ6/DQ2 (toggle bits). After a program or erase cycle  
has been completed, the device automatically returns  
to reading array data.  
The Am29DL162D/163D/164D devices uses multiple  
bank architectures to provide flexibility for different ap-  
plications. Three devices are available with the  
following bank sizes:  
Device  
DL162  
DL163  
DL164  
Bank 1  
2 Mb  
Bank 2  
14 Mb  
12 Mb  
8 Mb  
The sector erase architecture allows memory sec-  
tors to be erased and reprogrammed without affecting  
the data contents of other sectors. The device is fully  
erased when shipped from the factory.  
4 Mb  
8 Mb  
Am29DL162D/163D/164D Features  
The SecSi (Secured Silicon) Sector is an extra 64  
Kbit sector capable of being permanently locked by  
AMD or customers. The SecSi Sector Indicator Bit  
(DQ7) is permanently set to a 1 if the part is factory  
locked, and set to a 0 if customer lockable. This way,  
customer lockable parts can never be used to replace  
a factory locked part.  
Hardware data protection measures include a low  
VCC detector that automatically inhibits write opera-  
tions during power transitions. The hardware sector  
protection feature disables both program and erase  
operations in any combination of the sectors of mem-  
or y. This can be achieved in-system or via  
programming equipment.  
Factory locked parts provide several options. The  
SecSi Sector may store a secure, random 16 byte  
ESN (Electronic Serial Number), customer code (pro-  
grammed through AMD’s ExpressFlash service), or  
both. Customer Lockable parts may utilize the SecSi  
Sector as bonus space, reading and writing like any  
The device offers two power-saving features. When  
addresses have been stable for a specified amount of  
time, the device enters the automatic sleep mode.  
The system can also place the device into the  
standby mode. Power consumption is greatly re-  
duced in both modes.  
2
Am29DL162D/163D/164D  

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